Source files

Mapping profiles

Import history

File	Kind	Rows	Checksum
VME-PROD-VehicleMotionManagement - VMMP_LAC_LACDCF.xlsx	requirement	32	27385d4165d3
VME-PROD-VehicleMotionManagement - VMMP_LAC_LACDC.xlsx	requirement	22	16b7ded7f53c
VME-PROD-VehicleMotionManagement - VMMP_LAC_LACCA.xlsx	requirement	45	74c778fc10e6
VME-PROD-VehicleMotionManagement - VMMP_HMS_HMSTC.xlsx	requirement	64	bedf4df3644e
VME-PROD-VehicleMotionManagement - VMMP_HMS_HMSPC.xlsx	requirement	215	707be66b24b8
VME-PROD-VehicleMotionManagement - VMMP_HMS_HMSOP.xlsx	requirement	126	6cefec4b8c99
VME-PROD-VehicleMotionManagement - VMMP_HMS_HMSHOLD.xlsx	requirement	201	a9877c98c65e
VME-PROD-VehicleMotionManagement - VMMP_HMS_HMSHC.xlsx	requirement	265	d3cba95ee982
VME-PROD-VehicleMotionManagement - VMMP_GSC.xlsx	requirement	34	7f9a3530486e
VME-PROD-VehicleMotionManagement - VMMP_FSS.xlsx	requirement	233	7f6368b69844
VME-PROD-VehicleMotionManagement - VMMP_CRM_CRMSA.xlsx	requirement	45	6fd09d9eaad1
VME-PROD-VehicleMotionManagement - VMMP_CRM_CRMFH.xlsx	requirement	65	6c4154af0fc0
VME-PROD-VehicleMotionManagement - VMMP_CRM_CRMEH.xlsx	requirement	45	81f06686c151
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBTJCSC.xlsx	requirement	31	049e9934afc9
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBPKCSC.xlsx	requirement	187	c0b573b3d6e6
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBLLCSC.xlsx	requirement	387	74c7265e7d19
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBLGLSCV.xlsx	requirement	120	63142cb3cf99
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBLGLSCA.xlsx	requirement	141	e177fafd88cb
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBLGLSA.xlsx	requirement	70	b23f72842974
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBLGCSC.xlsx	requirement	77	cb6690dec872

VME-PROD-VehicleMotionManagement - VMMP_LOC_LOCDC.xlsx · source records


Short description
This module Longitudinal Controller Distance Control (LOCDC) has multiple tasks:

1) calculate the velocity demand corrected by distance deviation

2) calculate and arbitrate the remaining distance to stop for distance control or distance limitation scenarios

3) plan the acceleration, velocity and distance targets for distance control scenarios

4) Initiate hold and drive requests for HMS

Initially it is checked if the relevant input channel is arbitrated and active.
Interface description
The valid versions of the signal and parameter files for the relevant SWRS are


The valid versions of the signals and parameter files can be found in SWRS SWC_VMMP (SWRS_Id 1078981): Chapter 2 "Interface description"
The valid version of the signal and parameter files for test basis can be found in CG to be tested.
Presetting/Framework/Definitions
Traceability
SWRS to Testcase: 

The latest revision of the test specification document is valid for the tracability SWRS to Testcase
SWRS to DOORS: 

DOORS-IDs are mentioned in the SWRS atrribute DOORS IDs. 

The latest baseline of the specification document (DOORS) is valid for the traceability SWRS to DOORS.
Toolchain
The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain.
For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used.
Tolerances
The allowed B2B deviation for all output-signals to the expected reactions is defined by the following tolerances:
Bool: No deviation allowed
UInt, Int: No deviation allowed
Float: 0.1% related to the permissible value range of the signal
It must be ensured that an output reaction occurs due to an event at the input within the same calculation step.
Protected Division
All divisions (composed of a numerator and denominator) are protected against division by zero or values close to zero to avoid overflows by setting a threshold.

When the absolute value of denominator becomes less than the specified threshold, then it will be replaced with the threshold multiplied with the sign of the denominator.

As far as not described differently the threshold VMMP_c_DivLim is used. The threshold must be a positive value.
Requirements
All outputs described in this document shall behave within the physical maximum and minumum values which are specified in SPE.
Distance Planner
Target Calculation
IF [OR(1,2)]

1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle

2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle

THEN:

LgtCtlD_FlgChg is true

ELSE:

LgtCtlD_FlgChg is not true
IF [OR(AND(1,4),AND(2,3),AND(1,2))]

1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle

2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle

3) TVCOP_s_LgtCtlD_FlgAcv is true

4) TVCOP_s_LgtCtlD_FlgUpd is true

THEN:

LgtCtlD_FlgUpd is true

ELSE:

LgtCtlD_FlgUpd is not true
IF[OR(1,2)]

1)TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle

2) LgtCtlD_FlgUpd is true

THEN:

LgtCtlD_FlgChg is true 

ELSE:

LgtCtlD_FlgChg is false
IF [AND(1,2)]

1) LgtCtlD_FlgChg is true

2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle

THEN:

LgtCtlD_DTar shall be equal to TVCOP_s_LgtCtlD_DTar
IF [AND(1,2)]

1) LgtCtlD_FlgChg is not true

2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle

THEN:

LgtCtlD_DTar shall be equal to LgtCtlD_DTar from the previous computation cycle
IF [1]

1) TVCOP_s_LgtCtlD_FlgAcv is smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle

THEN:

LgtCtlD_DTar shall be equal to -1
IF [OR(1,2)] 

1) LgtCtlD_FlgChg is true

2) TVCOP_s_LgtCtlD_FlgAcv is not true

THEN: 

LgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCor*VMMP_c_TiSmpl.

ELSE:

LgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCor*VMMP_c_TiSmpl.
VMMP_LOCDC_p_LgtCtlD_SwtDRemRstCorEna must be false.
IF [OR(1,2)] 

1) LgtCtlD_FlgChg is true

2) TVCOP_s_LgtCtlD_FlgAcv is not true

THEN: 

LgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCor*VMMP_c_TiSmpl.

ELSIF[1]:

1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true

THEN:

LgtCtlD_DTot is equal to MAX(the integrated value of VSOEM_s_VLgtVehCor, LgtCtlD_DTot from last computation cycle with the initial value 0)

ELSE:

LgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCor*VMMP_c_TiSmpl.
IF[1]:

1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true

THEN:

LgtCtlD_DTot must be greater or equal to LgtCtlD_DTot from last computation cycle with the initial value 0.
LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot.
IF[1]:

1)VMMP_LOCDC_p_LgtCtlD_SwtDRemCorEna is fasle

THEN:

LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot.

ELSEIF [OR(1,2)]

1) LgtCtlD_FlgChg 

is true

2) TVCOP_s_LgtCtlD_FlgAcv is false

THEN:

LgtCtlD_DRem is equal to LgtCtlD_DTar 

ELSEIF[1]

1)LOCDC_s_LgtCtlV_FlgCnclDrvOff from last computation cycle was true

THEN:

LgtCtlD_DRem is equal to MIN(the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCor*VMMP_c_TiSmpl, LgtCtlD_DRem from last computation cycle) with the intial value LgtCtlD_DTar 

ELSE:

LgtCtlD_DRem is equal to the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCor*VMMP_c_TiSmpl with the intial value LgtCtlD_DTar
Kalman Filter
The equations for a Kalman Filter will be explained here and will be referenced in the following requirements as "Time Update" and "Measurement Update".

The Kalman Filter is applied to the remaining distance LOCDC_m_LgtCtlD_DRem which is referenced as the estimate at the time step k based on the measurements up to the time step k xk|k in context of this Kalman Filter. The variance of this estimate will be labeled Pk|k.

The Kalman Filter is based on a linear state transition model and linear observation model:

xk|k-1 = Fxk-1|k-1 +Buk

yk = Hxk|k-1 ,

which are both assumed to be altered by gaussian noise given by the covariance of the system noise Q and covariance of the observation noise R, respectively.

By integrating the velocity we obtain:

F = 1

Buk = VSOEM_s_VLgtVehCor * VMMP_c_TiSmpl

The observation TVCOP_s_LgtCtlD_DTar is a direct measurement of the estimate:

yk = TVCOP_s_LgtCtlD_DTar

H = 1

For the covariance noises we introduce the parameters:

Q = VMMP_LOCDC_p_LgtCtlD_DVrnVLgtVehCor

R = VMMP_LOCDC_p_LgtCtlD_DVrnDTar

With these values the general Kalmen Filter equations can be calculated.

Time Update:

xk|k-1 = Fxk-1|k-1 +Buk

Pk|k-1 = FPk-1|k-1F+Q

Measurement Update:

Kk= Pk|k-1 H/(HPk|k-1H+R)

xk|k = xk|k-1 +Kk(yk -Hxk|k-1)

Pk|k = (1-KkH)Pk|k-1

The initialization of the Kalman Filter is allways done with:

Pk|k = R

xk|k = LOCDC_m_LgtCtlD_DTar
IF[OR(1,2)]:

1) LgtCtlD_FlgChg is true

2) TVCOP_s_LgtCtlD_FlgAcv is false

THEN:

LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after the initialization step.
IF[AND(1,2,OR(3,4),5)]:

1) LgtCtlD_FlgChg is false

2) TVCOP_s_LgtCtlD_FlgAcv is true

3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false

4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step

5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step 

THEN:

LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update.
IF[AND(1,2,OR(3,4),5)]:

1) LgtCtlD_FlgChg is false

2) TVCOP_s_LgtCtlD_FlgAcv is true

3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false

4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step

5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step 

THEN:

LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value).
IF[AND(1,2,3,4,5)]:

1) LgtCtlD_FlgChg is false

2) TVCOP_s_LgtCtlD_FlgAcv is true

3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true

4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step

5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step 

THEN:

LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update.
IF[AND(1,2,OR(3,4),5)]:

1) LgtCtlD_FlgChg is false

2) TVCOP_s_LgtCtlD_FlgAcv is true

3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true

4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step

5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step 

THEN:

LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value).
Transition ramp fot DTarUpdate

IF[OR(1,2)]:

1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was false in the last time step

2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is false

THEN:

LOCDC_m_LgtCtlD_DRemADmd is equal to LOCDC_m_LgtCtlD_DRem.
IF[AND(1,2,3)]:

1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step

2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true

3) LgtCtlD_FlgUpd is true

THEN:

a linear ramp is intilaized with LOCDC_m_LgtCtlD_DRemADmd from the last time step as the starting value. The linear transition factor is set to 0.
IF[AND(1,2,3)]:

1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step

2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true

3) LgtCtlD_FlgUpd is false

THEN:

The linear transition factor is increased by the product of the sample time and the result of the Look-Up-Table with

Input: LOCDC_m_LgtCtlD_DRem - starting value

Parameter Input-axis: VMMP_LOCDC_px_LgtCtlD_DRemDif

Parameter Output-axis: VMMP_LOCDC_p1_LgtCtlD_TiRampDRem

The linear transition factor 

is limited between 0 and 1.
IF[AND(1,2)]:

1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step

2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true

THEN:

LOCDC_m_LgtCtlD_DRemADmd is calculated by a linear interpolation between the starting value and LOCDC_m_LgtCtlD_DRem proportional to the linear transition factor.

Default signals
LgtCtlD_AMinClc must be equal to the

Lookuptable

 Input: VSOEM_s_VLgtVehCor

 Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh

 parameter for output: VMMP_LOCDC_p1_AMin

if not required differently in the chapter Distance Planner EF_Component Requirement 1259818.
If [1]

1) not required differently in the chapter Distance Planner EF_Component Requirement 1259818,

THEN:

 IF [2]

 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi

 THEN:

 LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1

 ELSE: 

 LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1Hi
IF [1]

1.) not required differently in the chapter Distance Planner EF_Component Requirement 1259818.

THEN: 

 IF [2]

 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi

 THEN: 

 LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3

 ELSE: 

 LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3Hi
AVehFrz must be equal to ASOPOT_s_ATqDmd if not required differently in the

chapter Distance Planner EF_Component Requirement 1259818.
VVehFrz must be equal to VSOEM_s_VLgtVehCor if not required differently in the

chapter Distance Planner EF_Component Requirement 1259818.
LgtCtlD_DTotClc
The Distance Control Algorithm must always consist of the following three phases.
ADmdRaw must be comprehended as a table over a theoretical time, where ADmdRaw is the table and time is the Axis (input).
Phase 1: ADmdRaw must ramp from AVehFrz to LgtCtlD_AMinClc with the gradient of LgtCtlD_AGrd1. The duration of this phase must be equal to Ti1.
Phase 2: ADmdRaw must hold the value of LgtCtlD_AMinClc, which must be the last value of Phase 1. The duration of this phase Ti2 is calculated by the following formula:

Ti2 = abs((VVehFrz + LgtCtlD_AGrd1*0.5*(Ti1)² + AVehFrz*Ti1 + LgtCtlD_AGrd3*0.5*(Ti3)² + LgtCtlD_AMinClc*Ti3) / LgtCtlD_AMinClc)

Threshold for Protected Division = 0.001
Phase 3: ADmdRaw must ramp from LgtCtlD_AMinClc to zero with the gradient of

LgtCtlD_AGrd3. The duration of this phase must be equal to Ti3.
LgtCtlD_DTotClc must be equal to the definite integral [of the sum of VVehFrz and the integral of ADmdRaw] where the intervals of both integral are [0,(Ti1+Ti2+Ti3)].
If LgtCtlD_FlgDPlanAcv is not true (see following requirement EF_Component Requirement 1262873), the calculation of this definite integral EF_Component Requirement 1262857 must be executed each computation cycle and must be reset to zero at the beginning of each computation cycle.
Triggers
IF[OR(AND(1,2,3),AND(2,3,4))] 

1) LgtCtlD_DRem is smaller than or equal to LgtCtlD_DTotClc from the pevious computation cycle 

2) TVCOP_s_LgtCtlD_FlgAcv is true

3) the by one computation cycle delayed signal LgtCtlD_DrvOffPsbl has no rising edge

4) LgtCtlD_FlgDPlanAcv was true in the previous computation cycle

THEN:

LgtCtlD_FlgDPlanAcv is true

ELSE:

LgtCtlD_FlgDPlanAcv is not true
IF[AND[1,2]] 

1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true

2) TVCOP_s_LgtCtlD_FlgAcv is true

THEN:

LgtCtlD_FlgDPlanAcv is true

ELSE:

LgtCtlD_FlgDPlanAcv is not true
IF[AND[1,2]] 

1) LgtCtlV_FlgAcvStopDCtl is true

2) TVCOP_s_LgtCtlD_FlgAcv is true

THEN:

LgtCtlD_FlgDPlanAcv is true

ELSE:

LgtCtlD_FlgDPlanAcv is not true
IF[AND(1,2,NOT(AND(3,4))] 

1) LgtCtlD_FlgDPlanAcv is true

2) LOCDC_s_LgtCtlV_FlgAcvStopLoV is false

3) LgtCtlD_FlgChg is true

4) FlgTrig was true in the previous computation cycle (initial value of the delayed FlgTrig is zero)

THEN:

FlgTrig is true

ELSE:

FlgTrig is not true
IF[OR(AND(1,2,3,4,5,6), AND(5,6,7)] 

1) LgtCtlD_FlgDPlanAcv is true 

2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl

3) LgtCtlD_DRem is greater than TVCOP_s_LgtCtlD_DTlrLo

4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff

5) LgtCtlD_DrvOffPsbl was true in the previous computation cycle

6) TVCOP_s_LgtCtlD_FlgAcv is true

7) LgtCtlD_FlgDPlanAcv has no rising edge

THEN:

LgtCtlD_DrvOffPsbl is true

ELSE:

LgtCtlD_DrvOffPsbl is not true

initial condition: 

LgtCtlD_DrvOffPsbl is not false
IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] 

1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true

2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl

3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo)

4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff

5) TVCOP_s_LgtCtlD_FlgAcv is true

6) LOCDC_s_LgtCtlV_FlgAcvStopLoV

has no rising edge

7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge

8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false

9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle

THEN:

LgtCtlD_DrvOffPsbl is true

ELSE:

LgtCtlD_DrvOffPsbl is not true

initial condition: 

LgtCtlD_DrvOffPsbl is not false
IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] 

1) LgtCtlV_FlgAcvStopDCtl is true

2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl

3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo)

4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff

5) TVCOP_s_LgtCtlD_FlgAcv is true

6) LgtCtlV_FlgAcvStopDCtl 

has no rising edge

7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge

8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false

9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle

THEN:

LgtCtlD_DrvOffPsbl is true

ELSE:

LgtCtlD_DrvOffPsbl is not true

initial condition: 

LgtCtlD_DrvOffPsbl is not false
IF[AND(1,2)]

1) LgtCtlD_FlgDPlanAcv is not true

2) LgtCtlD_DrvOffPsbl is true

THEN:

LgtCtlD_FlgDrvOff is true

ELSE:

LgtCtlD_FlgDrvOff is not true
IF[AND(1,2)]

1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is not true

2) LgtCtlD_DrvOffPsbl is true

THEN:

LgtCtlD_FlgDrvOff is true

ELSE:

LgtCtlD_FlgDrvOff is false
IF[AND(1,2)]

1) LgtCtlV_FlgAcvStopDCtl is not true

2) LgtCtlD_DrvOffPsbl is true

THEN:

LgtCtlD_FlgDrvOff is true

ELSE:

LgtCtlD_FlgDrvOff is false
IF [AND(1,2,3,OR(4,5,6))]

1) TVCOP_s_LgtCtlD_FlgAcv is true

2) LgtCtlD_DTar delayed by one computation cycle is greater than -1

3) LgtCtlD_DrvOffPsbl from last computation cycle has no rising edge

4) LgtCtlD_FlgUpd is false

5) TVCOP_s_LgtCtlD_DTar is smaller than or equal to DToStop from the last computation cycle

6) LgtCtlD_DTar is smaller than or equal to (VMMP_LOC_p_LgtD_DDifAFrz +2*VMMP_c_TiSmpl*VSOEM_s_VLgtVehCor+2*VMMP_c_TiSmpl^2*VSOEM_s_ALgtVehCor)

THEN:

FlgReqAcv is true

ELSE:

FlgReqAcv is false
Freezes
IF[AND(1,2)]

1)VSOEM_s_VLgtVehCor is smaller than VMMP_LOCDC_p_VThSwtARef

2)VMMP_LOCDC_p_SwtARefToALgtVehCor is true

THEN:

ARef is equal to VSOEM_s_ALgtVehCor

ELSE:

ARef is equal to ASOPOT_s_ATqDmd
IF[OR(1,2)]

1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv

2)Condition 1 changes from true to false for not longer than 2*VMMP_c_TiSmpl

THEN:

ADmdIniUpd must be equal to ADmdIniUpd from the previous computation cycle with the initial value of zero.

VDmdIniUpd must be equal to VDmdIniUpd from the previous computation cycle with the initial value of zero.

ELSE:

ADmdIniUpd must be equal to LgtCtlD_ADmd from the previous computation cycle

VDmdIniUpd must be equal to LgtCtlD_VDmd from the previous computation cycle
IF[1]

1) FlgTrig is true

THEN:

AVehFrz must be equal to AVehFrz delayed by one computation cycle with the initial value of ARef

VVehFrz must be equal to VVehFrz delayed by one computation cycle with the initial value of VSOEM_s_VLgtVehCor

ELSEIF[OR(1,2)]

1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv

2)Condition 1 changes from true to false for not longer than 2*VMMP_c_TiSmpl

THEN:

AVehFrz must be equal ADmdIniUpd

VVehFrz must be equal VDmdIniUpd

ELSE:

AVehFrz must be equal ARef

VVehFrz must be equal VSOEM_s_VLgtVehCor
IF[AND(1,2)] 

1) LgtCtlD_FlgChg is not true

2) FlgTrig is true

THEN:

DRemFrz is equal to DRemFrz from the previous computation cycle with initial value zero

ELSE:

DRemFrz is equal to LgtCtlD_DRem
SoftBrk Detection
IF[1] 

1) FlgTrig is not equal to LgtCtlD_FlgDPlanAcv

THEN: 

FlgTrigCmp is true

ELSE:

FlgTrigCmp is not true
IF[AND(OR(AND(1,2),3),4,AND(NOT(1),2))]

1) FlgTrigCmp is true

2) LgtCtlD_DTar is greater than the value of LgtCtlD_DRem delayed by one computation cycle with initial value zero

3) LgtCtlD_FlgSoftBrkTrj was true in the previous computation cycle

4) LgtCtlD_FlgDPlanAcv is true

THEN: 

LgtCtlD_FlgSoftBrkTrj is true

ELSE:

LgtCtlD_FlgSoftBrkTrj is not true
Iteration
IF[AND(1,2)] 

1) the absolute of (the sum of DRemFrz and (-1)*0.5*VMMP_LOCDC_p_DTotClcIterAcu and ((-1)*

LgtCtlD_DTotClc delayed by one computation cycle with initial value zero)) is greater than

VMMP_LOCDC_p_DTotClcIterAcu

2) FlgTrig is true

THEN:

LgtCtlD_FlgIterCdn is true

ELSE:

LgtCtlD_FlgIterCdn is not true
IF[AND(1,2,3)] 

1) LgtCtlD_FlgDPlanAcv is true

2) LgtCtlD_FlgIterCdn is true

3) LgtCtlD_FlgSoftBrkTrj is not true

THEN: 

LgtCtlD_AMinClc is decreased by iteration and must be smaller than

Lookuptable

 Input: VSOEM_s_VLgtVehCor

 Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh

 Parameter for output: VMMP_LOCDC_p1_AMin

LgtCtlD_AMinClc is negative

LgtCtlD_AGrd1 is decreased by iteration and must be smaller than

VMMP_LOCDC_p_AGrd1

LgtCtlD_AGrd1 is negative

LgtCtlD_AGrd3 is increased by iteration and must be greater than

VMMP_LOCDC_p_AGrd3

LgtCtlD_AGrd3 is positive

With the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see

EF_Component Requirement 1262844

EF_Component Requirement 1262846

EF_Component Requirement 1262854
IF[AND(1,2,3,4)] 

1) LgtCtlD_FlgDPlanAcv is true

2) LgtCtlD_FlgIterCdn is true

3) LgtCtlD_FlgSoftBrkTrj is true

4) VMMP_LOCDC_p_SoftBrkTrjIterEna is true

THEN: 

LgtCtlD_AMinClc is increased by iteration and must be greater than

Lookuptable

 Input: VSOEM_s_VLgtVehCor

 Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh

 Parameter for output: VMMP_LOCDC_p1_AMin

LgtCtlD_AMinClc is negative

LgtCtlD_AGrd1 is increased by iteration and must be greater than

VMMP_LOCDC_p_AGrd1

LgtCtlD_AGrd1 is positive

LgtCtlD_AGrd3 is decreased by iteration and must be smaller than

VMMP_LOCDC_p_AGrd3

LgtCtlD_AGrd3 is positive

With the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see

EF_Component Requirement 1262844

EF_Component Requirement 1262846

EF_Component Requirement 1262854
IF[AND(1,2,OR(AND(3,4),AND(5,6)))] 

1) LgtCtlD_FlgDPlanAcv is true

2) LgtCtlD_FlgIterCdn is true

3) LgtCtlD_FlgSoftBrkTrj is true

4) VMMP_LOCDC_p_SoftBrkTrjIterEna is not true

5) LgtCtlD_FlgDPlanAcv has a rising edge

6) Ti2 delayed by two computation cycles (initial value zero) is greater than 0.2

THEN: 

LgtCtlD_AMinClc is increased by iteration and must be greater than

Lookuptable

 Input: VSOEM_s_VLgtVehCor

 Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh

 Parameter for output: VMMP_LOCDC_p1_AMin

LgtCtlD_AMinClc is negative

LgtCtlD_AGrd1 is equal to (-1)*VMMP_LOCDC_p_AGrd1

LgtCtlD_AGrd3 is equal to VMMP_LOCDC_p_AGrd3

With the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see

EF_Component Requirement 1262844

EF_Component Requirement 1262846

EF_Component Requirement 1262854
Range of values
Due to functional design, if one of the following conditions is not true, the behaviour of this modules output (LOCDC) is not relevant:

LgtCtlD_AMinClc < -6

abs(LgtCtlD_AGrd1) < abs(VMMP_LOCDC_p_AGrd1IterTh)

LgtCtlD_AGrd3 < VMMP_LOCDC_p_AGrd3IterTh
Output Calculation
IF [1]

1) FlgTrig is true

THEN:

TiAbs is equal to the sum of TiAbs delayed by one computation cycle (initial value is zero) and VMMP_c_TiSmpl.

ELSE:

TiAbs is equal to zero
IF [1]

1) LgtCtlD_FlgDPlanAcv is true

THEN:

LgtCtlD_ADmd must be equal to the look up of the table ADmdRaw by using TiAbs as Axis (input), see EF_Component Requirement 1265396

with a tolerance of +- 10%.

ELSE:

LgtCtlD_ADmd must be equal to zero
In Phase 3, see EF_Component Requirement 1262854 ,

LgtCtlD_ADmd must always be smaller than zero.
LgtCtlD_VDmd must be equal to the derivative of LgtCtlD_ADmd with a tolerance of +- 3%.
LgtCtlD_DDmd must be equal to the derivative of LgtCtlD_VDmd with a tolerance of +- 2%.

Row	ID	Type	Status	Relevant	Candidate	Reason	Normalized text
2	16654155.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Short description Short description Raw { "ID": "16654155.0", "ASIL": " ", "Text": "Short description", "Type": "Folder", "Status": "", "Summary": "Short description", "Relevant": "no", "column_12": "", "Foreign ID": "1181210.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
3	16654156.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	This module Longitudinal Controller Distance Control (LOCDC) has multiple tasks: 1) calculate the velocity demand corrected by di This module Longitudinal Controller Distance Control (LOCDC) has multiple tasks: 1) calculate the velocity demand corrected by distance deviation 2) calculate and arbitrate the remaining distance to stop for distance control or distance limitation scenarios 3) plan the acceleration, velocity and distance targets for distance control scenarios 4) Initiate hold and drive requests for HMS Initially it is checked if the relevant input channel is arbitrated and active. Raw { "ID": "16654156.0", "ASIL": " ", "Text": "This module Longitudinal Controller Distance Control (LOCDC) has multiple tasks:\n\r1) calculate the velocity demand corrected by distance deviation\n\r2) calculate and arbitrate the remaining distance to stop for distance control or distance limitation scenarios\n\r3) plan the acceleration, velocity and distance targets for distance control scenarios\n\r4) Initiate hold and drive requests for HMS\n\rInitially it is checked if the relevant input channel is arbitrated and active.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181216.0", "Description": "This module Longitudinal Controller Distance Control (LOCDC) has multiple tasks:\n\r1) calculate the velocity demand corrected by distance deviation\n\r2) calculate and arbitrate the remaining distance to stop for distance control or distance limitation scenarios\n\r3) plan the acceleration, velocity and distance targets for distance control scenarios\n\r4) Initiate hold and drive requests for HMS\n\rInitially it is checked if the relevant input channel is arbitrated and active.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
4	16654157.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Interface description Interface description Raw { "ID": "16654157.0", "ASIL": " ", "Text": "Interface description", "Type": "Folder", "Status": "", "Summary": "Interface description", "Relevant": "no", "column_12": "", "Foreign ID": "1181212.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
5	16654158.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	The valid versions of the signal and parameter files for the relevant SWRS are The valid versions of the signal and parameter files for the relevant SWRS are Raw { "ID": "16654158.0", "ASIL": " ", "Text": "The valid versions of the signal and parameter files for the relevant SWRS are", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1473590.0", "Description": "The valid versions of the signal and parameter files for the relevant SWRS are", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
6	16654159.0	Information		no	False	type_not_target, status_filtered, relevance_filtered, empty_target_text	Raw { "ID": "16654159.0", "ASIL": " ", "Text": "No InterWiki reference defined in properties for 'Member /SWC_VMMP/01_PROD/30_CG/DevTools/Spec/VMMP/VMMP.parameter'", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1473592.0", "Description": "No InterWiki reference defined in properties for 'Member /SWC_VMMP/01_PROD/30_CG/DevTools/Spec/VMMP/VMMP.parameter'", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
7	16654160.0	Information		no	False	type_not_target, status_filtered, relevance_filtered, empty_target_text	Raw { "ID": "16654160.0", "ASIL": " ", "Text": "No InterWiki reference defined in properties for 'Member /SWC_VMMP/01_PROD/30_CG/DevTools/Spec/VMMP/VMMP.signal'", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1473593.0", "Description": "No InterWiki reference defined in properties for 'Member /SWC_VMMP/01_PROD/30_CG/DevTools/Spec/VMMP/VMMP.signal'", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
8	16654161.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	The valid versions of the signals and parameter files can be found in SWRS SWC_VMMP (SWRS_Id 1078981): Chapter 2 "Interface descri The valid versions of the signals and parameter files can be found in SWRS SWC_VMMP (SWRS_Id 1078981): Chapter 2 "Interface description" Raw { "ID": "16654161.0", "ASIL": " ", "Text": "The valid versions of the signals and parameter files can be found in SWRS SWC_VMMP (SWRS_Id 1078981): Chapter 2 \"Interface description\"", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1473591.0", "Description": "The valid versions of the signals and parameter files can be found in SWRS SWC_VMMP (SWRS_Id 1078981): Chapter 2 \"Interface description\"", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
9	16654162.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	The valid version of the signal and parameter files for test basis can be found in CG to be tested. The valid version of the signal and parameter files for test basis can be found in CG to be tested. Raw { "ID": "16654162.0", "ASIL": " ", "Text": "The valid version of the signal and parameter files for test basis can be found in CG to be tested.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1473589.0", "Description": "The valid version of the signal and parameter files for test basis can be found in CG to be tested.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
10	16654163.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Presetting/Framework/Definitions Presetting/Framework/Definitions Raw { "ID": "16654163.0", "ASIL": " ", "Text": "Presetting/Framework/Definitions", "Type": "Folder", "Status": "", "Summary": "Presetting/Framework/Definitions", "Relevant": "no", "column_12": "", "Foreign ID": "1181529.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
11	16654164.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Traceability Traceability Raw { "ID": "16654164.0", "ASIL": " ", "Text": "Traceability", "Type": "Folder", "Status": "", "Summary": "Traceability", "Relevant": "no", "column_12": "", "Foreign ID": "1307706.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
12	16654165.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	SWRS to Testcase: The latest revision of the test specification document is valid for the tracability SWRS to Testcase SWRS to Testcase: The latest revision of the test specification document is valid for the tracability SWRS to Testcase Raw { "ID": "16654165.0", "ASIL": " ", "Text": "SWRS to Testcase: \n\rNo InterWiki reference defined in properties for 'integrity' \n\r \n\rThe latest revision of the test specification document is valid for the tracability SWRS to Testcase", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1307708.0", "Description": "SWRS to Testcase: \n\rNo InterWiki reference defined in properties for 'integrity' \n\r \n\rThe latest revision of the test specification document is valid for the tracability SWRS to Testcase", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
13	16654166.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	SWRS to DOORS: DOORS-IDs are mentioned in the SWRS atrribute DOORS IDs. The latest baseline of the specification document (DOO SWRS to DOORS: DOORS-IDs are mentioned in the SWRS atrribute DOORS IDs. The latest baseline of the specification document (DOORS) is valid for the traceability SWRS to DOORS. Raw { "ID": "16654166.0", "ASIL": " ", "Text": "SWRS to DOORS: \n\r \n\rDOORS-IDs are mentioned in the SWRS atrribute DOORS IDs. \n\rThe latest baseline of the specification document (DOORS) is valid for the traceability SWRS to DOORS.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1307707.0", "Description": "SWRS to DOORS: \n\r \n\rDOORS-IDs are mentioned in the SWRS atrribute DOORS IDs. \n\rThe latest baseline of the specification document (DOORS) is valid for the traceability SWRS to DOORS.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
14	16654167.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Toolchain Toolchain Raw { "ID": "16654167.0", "ASIL": " ", "Text": "Toolchain", "Type": "Folder", "Status": "", "Summary": "Toolchain", "Relevant": "no", "column_12": "", "Foreign ID": "1181530.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
15	16654168.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain. The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain. Raw { "ID": "16654168.0", "ASIL": " QM", "Text": "The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain.", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181527.0", "Description": "The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
16	16654169.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used. For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used. Raw { "ID": "16654169.0", "ASIL": " QM", "Text": "For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used.", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181532.0", "Description": "For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
17	16654170.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Tolerances Tolerances Raw { "ID": "16654170.0", "ASIL": " ", "Text": "Tolerances", "Type": "Folder", "Status": "", "Summary": "Tolerances", "Relevant": "no", "column_12": "", "Foreign ID": "1181531.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
18	16654171.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	The allowed B2B deviation for all output-signals to the expected reactions is defined by the following tolerances: The allowed B2B deviation for all output-signals to the expected reactions is defined by the following tolerances: Raw { "ID": "16654171.0", "ASIL": " QM", "Text": "The allowed B2B deviation for all output-signals to the expected reactions is defined by the following tolerances:", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181528.0", "Description": "The allowed B2B deviation for all output-signals to the expected reactions is defined by the following tolerances:", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
19	16654172.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	Bool: No deviation allowed Bool: No deviation allowed Raw { "ID": "16654172.0", "ASIL": " QM", "Text": "\n\r \n\r Bool: No deviation allowed", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181526.0", "Description": "\n\r \n\r Bool: No deviation allowed", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
20	16654173.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	UInt, Int: No deviation allowed UInt, Int: No deviation allowed Raw { "ID": "16654173.0", "ASIL": " QM", "Text": "UInt, Int: No deviation allowed", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181533.0", "Description": "UInt, Int: No deviation allowed", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
21	16654174.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	Float: 0.1% related to the permissible value range of the signal Float: 0.1% related to the permissible value range of the signal Raw { "ID": "16654174.0", "ASIL": " QM", "Text": "Float: 0.1% related to the permissible value range of the signal", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181534.0", "Description": "Float: 0.1% related to the permissible value range of the signal", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
22	16654176.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	It must be ensured that an output reaction occurs due to an event at the input within the same calculation step. It must be ensured that an output reaction occurs due to an event at the input within the same calculation step. Raw { "ID": "16654176.0", "ASIL": " QM", "Text": "It must be ensured that an output reaction occurs due to an event at the input within the same calculation step.", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1181535.0", "Description": "It must be ensured that an output reaction occurs due to an event at the input within the same calculation step.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
23	16654177.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Protected Division Protected Division Raw { "ID": "16654177.0", "ASIL": " ", "Text": "Protected Division", "Type": "Folder", "Status": "", "Summary": "Protected Division", "Relevant": "no", "column_12": "", "Foreign ID": "1463349.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
24	16654178.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	All divisions (composed of a numerator and denominator) are protected against division by zero or values close to zero to avoid ov All divisions (composed of a numerator and denominator) are protected against division by zero or values close to zero to avoid overflows by setting a threshold. When the absolute value of denominator becomes less than the specified threshold, then it will be replaced with the threshold multiplied with the sign of the denominator. As far as not described differently the threshold VMMP_c_DivLim is used. The threshold must be a positive value. Raw { "ID": "16654178.0", "ASIL": " QM", "Text": "All divisions (composed of a numerator and denominator) are protected against division by zero or values close to zero to avoid overflows by setting a threshold.\n\rWhen the absolute value of denominator becomes less than the specified threshold, then it will be replaced with the threshold multiplied with the sign of the denominator.\n\rAs far as not described differently the threshold VMMP_c_DivLim is used. The threshold must be a positive value.", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1463350.0", "Description": "All divisions (composed of a numerator and denominator) are protected against division by zero or values close to zero to avoid overflows by setting a threshold.\n\rWhen the absolute value of denominator becomes less than the specified threshold, then it will be replaced with the threshold multiplied with the sign of the denominator.\n\rAs far as not described differently the threshold VMMP_c_DivLim is used. The threshold must be a positive value.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
25	16654179.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Requirements Requirements Raw { "ID": "16654179.0", "ASIL": " ", "Text": "Requirements", "Type": "Folder", "Status": "", "Summary": "Requirements", "Relevant": "no", "column_12": "", "Foreign ID": "1181215.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
26	39198291.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	All outputs described in this document shall behave within the physical maximum and minumum values which are specified in SPE. All outputs described in this document shall behave within the physical maximum and minumum values which are specified in SPE. Raw { "ID": "39198291.0", "ASIL": " QM", "Text": "All outputs described in this document shall behave within the physical maximum and minumum values which are specified in SPE.", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "All outputs described in this document shall behave within the physical maximum and minumum values which are specified in SPE.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
27	16654180.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Distance Planner Distance Planner Raw { "ID": "16654180.0", "ASIL": " ", "Text": "Distance Planner", "Type": "Folder", "Status": "", "Summary": "Distance Planner", "Relevant": "no", "column_12": "", "Foreign ID": "1259818.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
28	16654181.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Target Calculation Target Calculation Raw { "ID": "16654181.0", "ASIL": " ", "Text": "Target Calculation", "Type": "Folder", "Status": "", "Summary": "Target Calculation", "Relevant": "no", "column_12": "", "Foreign ID": "1265377.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
29	16654182.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [OR(1,2)] 1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle 2) TVCOP_s_Lgt IF [OR(1,2)] 1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle 2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle THEN: LgtCtlD_FlgChg is true ELSE: LgtCtlD_FlgChg is not true Raw { "ID": "16654182.0", "ASIL": " QM", "Text": "IF [OR(1,2)]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\r2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_FlgChg is true\n\rELSE:\n\rLgtCtlD_FlgChg is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1259788.0", "Description": "IF [OR(1,2)]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\r2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_FlgChg is true\n\rELSE:\n\rLgtCtlD_FlgChg is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
30	23513813.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [OR(AND(1,4),AND(2,3),AND(1,2))] 1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computatio IF [OR(AND(1,4),AND(2,3),AND(1,2))] 1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle 2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle 3) TVCOP_s_LgtCtlD_FlgAcv is true 4) TVCOP_s_LgtCtlD_FlgUpd is true THEN: LgtCtlD_FlgUpd is true ELSE: LgtCtlD_FlgUpd is not true Raw { "ID": "23513813.0", "ASIL": " QM", "Text": "IF [OR(AND(1,4),AND(2,3),AND(1,2))]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\r2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle\n\r3) TVCOP_s_LgtCtlD_FlgAcv is true\n\r4) TVCOP_s_LgtCtlD_FlgUpd is true\n\rTHEN:\n\rLgtCtlD_FlgUpd is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgUpd is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF [OR(AND(1,4),AND(2,3),AND(1,2))]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\r2) TVCOP_s_LgtCtlD_FlgUpd is greater than TVCOP_s_LgtCtlD_FlgUpd from the previous computation cycle\n\r3) TVCOP_s_LgtCtlD_FlgAcv is true\n\r4) TVCOP_s_LgtCtlD_FlgUpd is true\n\rTHEN:\n\rLgtCtlD_FlgUpd is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgUpd is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
31	22423183.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(1,2)] 1)TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle 2) LgtCtlD_FlgUp IF[OR(1,2)] 1)TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle 2) LgtCtlD_FlgUpd is true THEN: LgtCtlD_FlgChg is true ELSE: LgtCtlD_FlgChg is false Raw { "ID": "22423183.0", "ASIL": " QM", "Text": "IF[OR(1,2)]\n\r1)TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\r2) LgtCtlD_FlgUpd is true\n\rTHEN:\n\rLgtCtlD_FlgChg is true \n\r \n\rELSE:\n\rLgtCtlD_FlgChg is false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[OR(1,2)]\n\r1)TVCOP_s_LgtCtlD_FlgAcv is greater than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\r2) LgtCtlD_FlgUpd is true\n\rTHEN:\n\rLgtCtlD_FlgChg is true \n\r \n\rELSE:\n\rLgtCtlD_FlgChg is false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
32	16654183.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [AND(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous c IF [AND(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle THEN: LgtCtlD_DTar shall be equal to TVCOP_s_LgtCtlD_DTar Raw { "ID": "16654183.0", "ASIL": " QM", "Text": "IF [AND(1,2)]\n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_DTar shall be equal to TVCOP_s_LgtCtlD_DTar", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1259790.0", "Description": "IF [AND(1,2)]\n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_DTar shall be equal to TVCOP_s_LgtCtlD_DTar", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
33	16654184.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [AND(1,2)] 1) LgtCtlD_FlgChg is not true 2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previo IF [AND(1,2)] 1) LgtCtlD_FlgChg is not true 2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle THEN: LgtCtlD_DTar shall be equal to LgtCtlD_DTar from the previous computation cycle Raw { "ID": "16654184.0", "ASIL": " QM", "Text": "IF [AND(1,2)]\n\r1) LgtCtlD_FlgChg is not true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_DTar shall be equal to LgtCtlD_DTar from the previous computation cycle", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1259797.0", "Description": "IF [AND(1,2)]\n\r1) LgtCtlD_FlgChg is not true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_DTar shall be equal to LgtCtlD_DTar from the previous computation cycle", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
34	16654185.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [1] 1) TVCOP_s_LgtCtlD_FlgAcv is smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle THEN: LgtCtlD_DTar IF [1] 1) TVCOP_s_LgtCtlD_FlgAcv is smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle THEN: LgtCtlD_DTar shall be equal to -1 Raw { "ID": "16654185.0", "ASIL": " QM", "Text": "IF [1]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_DTar shall be equal to -1", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1259803.0", "Description": "IF [1]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is smaller than TVCOP_s_LgtCtlD_FlgAcv from the previous computation cycle\n\rTHEN:\n\rLgtCtlD_DTar shall be equal to -1", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
35	16654186.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [OR(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is not true THEN: LgtCtlD_DTot is equal to the product of V IF [OR(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is not true THEN: LgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCorVMMP_c_TiSmpl. ELSE: LgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCorVMMP_c_TiSmpl. Raw { "ID": "16654186.0", "ASIL": " QM", "Text": "IF [OR(1,2)] \n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not true\n\rTHEN: \n\rLgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.\n\r \n\rELSE:\n\rLgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1259813.0", "Description": "IF [OR(1,2)] \n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not true\n\rTHEN: \n\rLgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.\n\r \n\rELSE:\n\rLgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
36	26914151.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	VMMP_LOCDC_p_LgtCtlD_SwtDRemRstCorEna must be false. VMMP_LOCDC_p_LgtCtlD_SwtDRemRstCorEna must be false. Raw { "ID": "26914151.0", "ASIL": " QM", "Text": "VMMP_LOCDC_p_LgtCtlD_SwtDRemRstCorEna must be false.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "VMMP_LOCDC_p_LgtCtlD_SwtDRemRstCorEna must be false.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
37	26913337.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [OR(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is not true THEN: LgtCtlD_DTot is equal to the product of V IF [OR(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is not true THEN: LgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCorVMMP_c_TiSmpl. ELSIF[1]: 1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true THEN: LgtCtlD_DTot is equal to MAX(the integrated value of VSOEM_s_VLgtVehCor, LgtCtlD_DTot from last computation cycle with the initial value 0) ELSE: LgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCorVMMP_c_TiSmpl. Raw { "ID": "26913337.0", "ASIL": " QM", "Text": "IF [OR(1,2)] \n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not true\n\rTHEN: \n\rLgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.\n\r \n\rELSIF[1]:\n\r1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true\n\rTHEN:\n\rLgtCtlD_DTot is equal to MAX(the integrated value of VSOEM_s_VLgtVehCor, LgtCtlD_DTot from last computation cycle with the initial value 0)\n\r \n\rELSE:\n\rLgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF [OR(1,2)] \n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is not true\n\rTHEN: \n\rLgtCtlD_DTot is equal to the product of VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.\n\r \n\rELSIF[1]:\n\r1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true\n\rTHEN:\n\rLgtCtlD_DTot is equal to MAX(the integrated value of VSOEM_s_VLgtVehCor, LgtCtlD_DTot from last computation cycle with the initial value 0)\n\r \n\rELSE:\n\rLgtCtlD_DTot is equal to the integrated value of VSOEM_s_VLgtVehCor. The initial value of the integration is equal to VSOEM_s_VLgtVehCorVMMP_c_TiSmpl.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
38	22779132.0	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	IF[1]: 1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true THEN: LgtCtlD_DTot must be greater or equal to LgtCtlD_D IF[1]: 1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true THEN: LgtCtlD_DTot must be greater or equal to LgtCtlD_DTot from last computation cycle with the initial value 0. Raw { "ID": "22779132.0", "ASIL": " QM", "Text": "IF[1]:\n\r1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true\n\rTHEN:\n\rLgtCtlD_DTot must be greater or equal to LgtCtlD_DTot from last computation cycle with the initial value 0.", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[1]:\n\r1)LOCDC_s_LgtCtlV_FlgCnclDrvOff in the last computation is true\n\rTHEN:\n\rLgtCtlD_DTot must be greater or equal to LgtCtlD_DTot from last computation cycle with the initial value 0.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
39	16654187.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot. LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot. Raw { "ID": "16654187.0", "ASIL": " QM", "Text": "LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1259807.0", "Description": "LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
40	23262393.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[1]: 1)VMMP_LOCDC_p_LgtCtlD_SwtDRemCorEna is fasle THEN: LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot. EL IF[1]: 1)VMMP_LOCDC_p_LgtCtlD_SwtDRemCorEna is fasle THEN: LgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot. ELSEIF [OR(1,2)] 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is false THEN: LgtCtlD_DRem is equal to LgtCtlD_DTar ELSEIF[1] 1)LOCDC_s_LgtCtlV_FlgCnclDrvOff from last computation cycle was true THEN: LgtCtlD_DRem is equal to MIN(the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCorVMMP_c_TiSmpl, LgtCtlD_DRem from last computation cycle) with the intial value LgtCtlD_DTar ELSE: LgtCtlD_DRem is equal to the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCorVMMP_c_TiSmpl with the intial value LgtCtlD_DTar Raw { "ID": "23262393.0", "ASIL": " QM", "Text": "IF[1]:\n\r1)VMMP_LOCDC_p_LgtCtlD_SwtDRemCorEna is fasle\n\rTHEN:\n\rLgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot.\n\rELSEIF [OR(1,2)]\n\r1) LgtCtlD_FlgChg \n\ris true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is false\n\rTHEN:\n\rLgtCtlD_DRem is equal to LgtCtlD_DTar \n\rELSEIF[1]\n\r1)LOCDC_s_LgtCtlV_FlgCnclDrvOff from last computation cycle was true\n\rTHEN:\n\rLgtCtlD_DRem is equal to MIN(the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCorVMMP_c_TiSmpl, LgtCtlD_DRem from last computation cycle) with the intial value LgtCtlD_DTar \n\rELSE:\n\rLgtCtlD_DRem is equal to the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCorVMMP_c_TiSmpl with the intial value LgtCtlD_DTar", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[1]:\n\r1)VMMP_LOCDC_p_LgtCtlD_SwtDRemCorEna is fasle\n\rTHEN:\n\rLgtCtlD_DRem is the difference of LgtCtlD_DTar and LgtCtlD_DTot.\n\rELSEIF [OR(1,2)]\n\r1) LgtCtlD_FlgChg \n\ris true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is false\n\rTHEN:\n\rLgtCtlD_DRem is equal to LgtCtlD_DTar \n\rELSEIF[1]\n\r1)LOCDC_s_LgtCtlV_FlgCnclDrvOff from last computation cycle was true\n\rTHEN:\n\rLgtCtlD_DRem is equal to MIN(the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCorVMMP_c_TiSmpl, LgtCtlD_DRem from last computation cycle) with the intial value LgtCtlD_DTar \n\rELSE:\n\rLgtCtlD_DRem is equal to the difference of LgtCtlD_DRem from last computation cycle and VSOEM_s_VLgtVehCorVMMP_c_TiSmpl with the intial value LgtCtlD_DTar", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
41	37750167.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Kalman Filter Kalman Filter Raw { "ID": "37750167.0", "ASIL": " ", "Text": "Kalman Filter", "Type": "Folder", "Status": "", "Summary": "Kalman Filter", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "" }
42	37764021.0	Information		no	False	type_not_target, status_filtered, relevance_filtered	The equations for a Kalman Filter will be explained here and will be referenced in the following requirements as "Time Update" and The equations for a Kalman Filter will be explained here and will be referenced in the following requirements as "Time Update" and "Measurement Update". The Kalman Filter is applied to the remaining distance LOCDC_m_LgtCtlD_DRem which is referenced as the estimate at the time step k based on the measurements up to the time step k xk\|k in context of this Kalman Filter. The variance of this estimate will be labeled Pk\|k. The Kalman Filter is based on a linear state transition model and linear observation model: xk\|k-1 = Fxk-1\|k-1 +Buk yk = Hxk\|k-1 , which are both assumed to be altered by gaussian noise given by the covariance of the system noise Q and covariance of the observation noise R, respectively. By integrating the velocity we obtain: F = 1 Buk = VSOEM_s_VLgtVehCor * VMMP_c_TiSmpl The observation TVCOP_s_LgtCtlD_DTar is a direct measurement of the estimate: yk = TVCOP_s_LgtCtlD_DTar H = 1 For the covariance noises we introduce the parameters: Q = VMMP_LOCDC_p_LgtCtlD_DVrnVLgtVehCor R = VMMP_LOCDC_p_LgtCtlD_DVrnDTar With these values the general Kalmen Filter equations can be calculated. Time Update: xk\|k-1 = Fxk-1\|k-1 +Buk Pk\|k-1 = FPk-1\|k-1F+Q Measurement Update: Kk= Pk\|k-1 H/(HPk\|k-1H+R) xk\|k = xk\|k-1 +Kk(yk -Hxk\|k-1) Pk\|k = (1-KkH)Pk\|k-1 The initialization of the Kalman Filter is allways done with: Pk\|k = R xk\|k = LOCDC_m_LgtCtlD_DTar Raw { "ID": "37764021.0", "ASIL": " ", "Text": "The equations for a Kalman Filter will be explained here and will be referenced in the following requirements as \"Time Update\" and \"Measurement Update\".\n\rThe Kalman Filter is applied to the remaining distance LOCDC_m_LgtCtlD_DRem which is referenced as the estimate at the time step k based on the measurements up to the time step k xk\|k in context of this Kalman Filter. The variance of this estimate will be labeled Pk\|k.\n\r \n\rThe Kalman Filter is based on a linear state transition model and linear observation model:\n\rxk\|k-1 = Fxk-1\|k-1 +Buk\n\ryk = Hxk\|k-1 ,\n\rwhich are both assumed to be altered by gaussian noise given by the covariance of the system noise Q and covariance of the observation noise R, respectively.\n\rBy integrating the velocity we obtain:\n\rF = 1\n\rBuk = VSOEM_s_VLgtVehCor * VMMP_c_TiSmpl\n\rThe observation TVCOP_s_LgtCtlD_DTar is a direct measurement of the estimate:\n\ryk = TVCOP_s_LgtCtlD_DTar\n\rH = 1\n\rFor the covariance noises we introduce the parameters:\n\rQ = VMMP_LOCDC_p_LgtCtlD_DVrnVLgtVehCor\n\rR = VMMP_LOCDC_p_LgtCtlD_DVrnDTar\n\r \n\rWith these values the general Kalmen Filter equations can be calculated.\n\rTime Update:\n\rxk\|k-1 = Fxk-1\|k-1 +Buk\n\rPk\|k-1 = FPk-1\|k-1F+Q\n\rMeasurement Update:\n\rKk= Pk\|k-1 H/(HPk\|k-1H+R)\n\rxk\|k = xk\|k-1 +Kk(yk -Hxk\|k-1)\n\rPk\|k = (1-KkH)Pk\|k-1\n\r \n\rThe initialization of the Kalman Filter is allways done with:\n\rPk\|k = R\n\rxk\|k = LOCDC_m_LgtCtlD_DTar", "Type": "Information", "Status": "", "Summary": "equations Kalman Filter", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "The equations for a Kalman Filter will be explained here and will be referenced in the following requirements as \"Time Update\" and \"Measurement Update\".\n\rThe Kalman Filter is applied to the remaining distance LOCDC_m_LgtCtlD_DRem which is referenced as the estimate at the time step k based on the measurements up to the time step k xk\|k in context of this Kalman Filter. The variance of this estimate will be labeled Pk\|k.\n\r \n\rThe Kalman Filter is based on a linear state transition model and linear observation model:\n\rxk\|k-1 = Fxk-1\|k-1 +Buk\n\ryk = Hxk\|k-1 ,\n\rwhich are both assumed to be altered by gaussian noise given by the covariance of the system noise Q and covariance of the observation noise R, respectively.\n\rBy integrating the velocity we obtain:\n\rF = 1\n\rBuk = VSOEM_s_VLgtVehCor * VMMP_c_TiSmpl\n\rThe observation TVCOP_s_LgtCtlD_DTar is a direct measurement of the estimate:\n\ryk = TVCOP_s_LgtCtlD_DTar\n\rH = 1\n\rFor the covariance noises we introduce the parameters:\n\rQ = VMMP_LOCDC_p_LgtCtlD_DVrnVLgtVehCor\n\rR = VMMP_LOCDC_p_LgtCtlD_DVrnDTar\n\r \n\rWith these values the general Kalmen Filter equations can be calculated.\n\rTime Update:\n\rxk\|k-1 = Fxk-1\|k-1 +Buk\n\rPk\|k-1 = FPk-1\|k-1F+Q\n\rMeasurement Update:\n\rKk= Pk\|k-1 H/(HPk\|k-1H+R)\n\rxk\|k = xk\|k-1 +Kk(yk -Hxk\|k-1)\n\rPk\|k = (1-KkH)Pk\|k-1\n\r \n\rThe initialization of the Kalman Filter is allways done with:\n\rPk\|k = R\n\rxk\|k = LOCDC_m_LgtCtlD_DTar", "Vehicle Launch": "", "Vehicle Platform": "" }
43	37789539.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(1,2)]: 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is false THEN: LOCDC_m_LgtCtlD_DRem is the estimate of the Ka IF[OR(1,2)]: 1) LgtCtlD_FlgChg is true 2) TVCOP_s_LgtCtlD_FlgAcv is false THEN: LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after the initialization step. Raw { "ID": "37789539.0", "ASIL": " QM", "Text": "IF[OR(1,2)]:\n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is false\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after the initialization step.", "Type": "Pre Condition", "Status": "Released", "Summary": "Kalman Filter initialization", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[OR(1,2)]:\n\r1) LgtCtlD_FlgChg is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is false\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after the initialization step.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
44	37793855.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,OR(3,4),5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is fal IF[AND(1,2,OR(3,4),5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false 4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step 5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step THEN: LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update. Raw { "ID": "37793855.0", "ASIL": " QM", "Text": "IF[AND(1,2,OR(3,4),5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false\n\r4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update.", "Type": "Pre Condition", "Status": "Released", "Summary": "Measurement & Time Update", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2,OR(3,4),5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false\n\r4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
45	37794684.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,OR(3,4),5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is fal IF[AND(1,2,OR(3,4),5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false 4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step 5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step THEN: LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value). Raw { "ID": "37794684.0", "ASIL": " QM", "Text": "IF[AND(1,2,OR(3,4),5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false\n\r4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value).", "Type": "Pre Condition", "Status": "Released", "Summary": "Measurement & Time Update + increasing protection", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2,OR(3,4),5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is false\n\r4) TVCOP_s_LgtCtlD_DTar changed its value from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update and a subsequent Measurement Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
46	37795047.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,3,4,5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true 4 IF[AND(1,2,3,4,5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true 4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step 5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step THEN: LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update. Raw { "ID": "37795047.0", "ASIL": " QM", "Text": "IF[AND(1,2,3,4,5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true\n\r4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update.", "Type": "Pre Condition", "Status": "Released", "Summary": "Time Update", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2,3,4,5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true\n\r4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was false in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
47	37795051.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,OR(3,4),5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is tru IF[AND(1,2,OR(3,4),5)]: 1) LgtCtlD_FlgChg is false 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true 4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step 5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step THEN: LOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value). Raw { "ID": "37795051.0", "ASIL": " QM", "Text": "IF[AND(1,2,OR(3,4),5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true\n\r4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value).", "Type": "Pre Condition", "Status": "Released", "Summary": "Time Update + increasing protection", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2,OR(3,4),5)]:\n\r1) LgtCtlD_FlgChg is false\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) VMMP_LOCDC_p_LgtCtlD_SwtFilOnChg is true\n\r4) TVCOP_s_LgtCtlD_DTar is unchanged from the last to this time step\n\r5) LOCDC_s_LgtCtlV_FlgCnclDrvOff was true in the last time step \n\r\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRem is the estimate of the Kalman Filter after a Time Update but cannot be higher then LOCDC_m_LgtCtlD_DRem was in the last time step (limited to the old value).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
48	37795551.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Transition ramp fot DTarUpdate Transition ramp fot DTarUpdate Raw { "ID": "37795551.0", "ASIL": " ", "Text": "Transition ramp fot DTarUpdate", "Type": "Folder", "Status": "", "Summary": "Transition ramp fot DTarUpdate", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "" }
49	37795552.0	Information		no	False	type_not_target, status_filtered, relevance_filtered, empty_target_text	Raw { "ID": "37795552.0", "ASIL": " ", "Text": "", "Type": "Information", "Status": "", "Summary": "Transion ramp information", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "" }
50	37795553.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(1,2)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was false in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is false THE IF[OR(1,2)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was false in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is false THEN: LOCDC_m_LgtCtlD_DRemADmd is equal to LOCDC_m_LgtCtlD_DRem. Raw { "ID": "37795553.0", "ASIL": " QM", "Text": "IF[OR(1,2)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was false in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is false\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRemADmd is equal to LOCDC_m_LgtCtlD_DRem.", "Type": "Pre Condition", "Status": "Released", "Summary": "no transition", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[OR(1,2)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was false in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is false\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRemADmd is equal to LOCDC_m_LgtCtlD_DRem.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
51	37795554.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,3)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true 3) IF[AND(1,2,3)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true 3) LgtCtlD_FlgUpd is true THEN: a linear ramp is intilaized with LOCDC_m_LgtCtlD_DRemADmd from the last time step as the starting value. The linear transition factor is set to 0. Raw { "ID": "37795554.0", "ASIL": " QM", "Text": "IF[AND(1,2,3)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true\n\r3) LgtCtlD_FlgUpd is true\n\rTHEN:\n\ra linear ramp is intilaized with LOCDC_m_LgtCtlD_DRemADmd from the last time step as the starting value. The linear transition factor is set to 0.", "Type": "Pre Condition", "Status": "Released", "Summary": "initialization of transition ramp", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2,3)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true\n\r3) LgtCtlD_FlgUpd is true\n\rTHEN:\n\ra linear ramp is intilaized with LOCDC_m_LgtCtlD_DRemADmd from the last time step as the starting value. The linear transition factor is set to 0.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
52	37795555.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,3)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true 3) IF[AND(1,2,3)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true 3) LgtCtlD_FlgUpd is false THEN: The linear transition factor is increased by the product of the sample time and the result of the Look-Up-Table with Input: LOCDC_m_LgtCtlD_DRem - starting value Parameter Input-axis: VMMP_LOCDC_px_LgtCtlD_DRemDif Parameter Output-axis: VMMP_LOCDC_p1_LgtCtlD_TiRampDRem The linear transition factor is limited between 0 and 1. Raw { "ID": "37795555.0", "ASIL": " QM", "Text": "IF[AND(1,2,3)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true\n\r3) LgtCtlD_FlgUpd is false\n\rTHEN:\n\rThe linear transition factor is increased by the product of the sample time and the result of the Look-Up-Table with\n\rInput: LOCDC_m_LgtCtlD_DRem - starting value\n\rParameter Input-axis: VMMP_LOCDC_px_LgtCtlD_DRemDif\n\rParameter Output-axis: VMMP_LOCDC_p1_LgtCtlD_TiRampDRem\n\rThe linear transition factor \n\ris limited between 0 and 1.", "Type": "Pre Condition", "Status": "Released", "Summary": "linear transition factor", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2,3)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true\n\r3) LgtCtlD_FlgUpd is false\n\rTHEN:\n\rThe linear transition factor is increased by the product of the sample time and the result of the Look-Up-Table with\n\rInput: LOCDC_m_LgtCtlD_DRem - starting value\n\rParameter Input-axis: VMMP_LOCDC_px_LgtCtlD_DRemDif\n\rParameter Output-axis: VMMP_LOCDC_p1_LgtCtlD_TiRampDRem\n\rThe linear transition factor \n\ris limited between 0 and 1.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
53	37795556.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true THEN IF[AND(1,2)]: 1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step 2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true THEN: LOCDC_m_LgtCtlD_DRemADmd is calculated by a linear interpolation between the starting value and LOCDC_m_LgtCtlD_DRem proportional to the linear transition factor. Raw { "ID": "37795556.0", "ASIL": " QM", "Text": "IF[AND(1,2)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRemADmd is calculated by a linear interpolation between the starting value and LOCDC_m_LgtCtlD_DRem proportional to the linear transition factor.", "Type": "Pre Condition", "Status": "Released", "Summary": "transition ramp", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2)]:\n\r1) LOCDC_m_LgtCtlV_FlgAcvStopDCtl was true in the last time step\n\r2) VMMP_LOCDC_p_LgtCtlD_SwtDRemRamp is true\n\rTHEN:\n\rLOCDC_m_LgtCtlD_DRemADmd is calculated by a linear interpolation between the starting value and LOCDC_m_LgtCtlD_DRem proportional to the linear transition factor.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
54	37795557.0	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered, empty_target_text	Raw { "ID": "37795557.0", "ASIL": " QM", "Text": "", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
55	16654188.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Default signals Default signals Raw { "ID": "16654188.0", "ASIL": " ", "Text": "Default signals", "Type": "Folder", "Status": "", "Summary": "Default signals", "Relevant": "no", "column_12": "", "Foreign ID": "1262840.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
56	16654190.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	LgtCtlD_AMinClc must be equal to the Lookuptable Input: VSOEM_s_VLgtVehCor Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh para LgtCtlD_AMinClc must be equal to the Lookuptable Input: VSOEM_s_VLgtVehCor Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh parameter for output: VMMP_LOCDC_p1_AMin if not required differently in the chapter Distance Planner EF_Component Requirement 1259818. Raw { "ID": "16654190.0", "ASIL": " QM", "Text": "LgtCtlD_AMinClc must be equal to the\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r parameter for output: VMMP_LOCDC_p1_AMin\n\rif not required differently in the chapter Distance Planner EF_Component Requirement 1259818.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262842.0", "Description": "LgtCtlD_AMinClc must be equal to the\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r parameter for output: VMMP_LOCDC_p1_AMin\n\rif not required differently in the chapter Distance Planner EF_Component Requirement 1259818.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
57	16654191.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	If [1] 1) not required differently in the chapter Distance Planner EF_Component Requirement 1259818, THEN: IF [2] 2.) VSOEM_ If [1] 1) not required differently in the chapter Distance Planner EF_Component Requirement 1259818, THEN: IF [2] 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi THEN: LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1 ELSE: LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1Hi Raw { "ID": "16654191.0", "ASIL": " QM", "Text": "If [1]\n\r1) not required differently in the chapter Distance Planner EF_Component Requirement 1259818,\n\rTHEN:\n\r IF [2]\n\r 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi\n\r THEN:\n\r LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1\n\r ELSE: \n\r LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1Hi", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1264915.0", "Description": "If [1]\n\r1) not required differently in the chapter Distance Planner EF_Component Requirement 1259818,\n\rTHEN:\n\r IF [2]\n\r 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi\n\r THEN:\n\r LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1\n\r ELSE: \n\r LgtCtlD_AGrd1 must be equal to VMMP_LOCDC_p_AGrd1Hi", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
58	16654192.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [1] 1.) not required differently in the chapter Distance Planner EF_Component Requirement 1259818. THEN: IF [2] 2.) VSOE IF [1] 1.) not required differently in the chapter Distance Planner EF_Component Requirement 1259818. THEN: IF [2] 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi THEN: LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3 ELSE: LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3Hi Raw { "ID": "16654192.0", "ASIL": " QM", "Text": "IF [1]\n\r1.) not required differently in the chapter Distance Planner EF_Component Requirement 1259818.\n\rTHEN: \n\r IF [2]\n\r 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi\n\r THEN: \n\r LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3\n\r ELSE: \n\r LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3Hi", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1264917.0", "Description": "IF [1]\n\r1.) not required differently in the chapter Distance Planner EF_Component Requirement 1259818.\n\rTHEN: \n\r IF [2]\n\r 2.) VSOEM_s_VLgtVehCor > VMMP_LOCDC_p_VThAGrdHi\n\r THEN: \n\r LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3\n\r ELSE: \n\r LgtCtlD_AGrd3 must be equal to VMMP_LOCDC_p_AGrd3Hi", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
59	16654193.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	AVehFrz must be equal to ASOPOT_s_ATqDmd if not required differently in the chapter Distance Planner EF_Component Requirement 125 AVehFrz must be equal to ASOPOT_s_ATqDmd if not required differently in the chapter Distance Planner EF_Component Requirement 1259818. Raw { "ID": "16654193.0", "ASIL": " QM", "Text": "AVehFrz must be equal to ASOPOT_s_ATqDmd if not required differently in the\n\rchapter Distance Planner EF_Component Requirement 1259818.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265329.0", "Description": "AVehFrz must be equal to ASOPOT_s_ATqDmd if not required differently in the\n\rchapter Distance Planner EF_Component Requirement 1259818.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
60	16654194.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	VVehFrz must be equal to VSOEM_s_VLgtVehCor if not required differently in the chapter Distance Planner EF_Component Requirement VVehFrz must be equal to VSOEM_s_VLgtVehCor if not required differently in the chapter Distance Planner EF_Component Requirement 1259818. Raw { "ID": "16654194.0", "ASIL": " QM", "Text": "VVehFrz must be equal to VSOEM_s_VLgtVehCor if not required differently in the\n\rchapter Distance Planner EF_Component Requirement 1259818.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265331.0", "Description": "VVehFrz must be equal to VSOEM_s_VLgtVehCor if not required differently in the\n\rchapter Distance Planner EF_Component Requirement 1259818.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
61	16654195.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	LgtCtlD_DTotClc LgtCtlD_DTotClc Raw { "ID": "16654195.0", "ASIL": " ", "Text": "LgtCtlD_DTotClc", "Type": "Folder", "Status": "", "Summary": "LgtCtlD_DTotClc", "Relevant": "no", "column_12": "", "Foreign ID": "1265360.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
62	16654196.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	The Distance Control Algorithm must always consist of the following three phases. The Distance Control Algorithm must always consist of the following three phases. Raw { "ID": "16654196.0", "ASIL": " QM", "Text": "The Distance Control Algorithm must always consist of the following three phases.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1264913.0", "Description": "The Distance Control Algorithm must always consist of the following three phases.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
63	16654197.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	ADmdRaw must be comprehended as a table over a theoretical time, where ADmdRaw is the table and time is the Axis (input). ADmdRaw must be comprehended as a table over a theoretical time, where ADmdRaw is the table and time is the Axis (input). Raw { "ID": "16654197.0", "ASIL": " QM", "Text": "ADmdRaw must be comprehended as a table over a theoretical time, where ADmdRaw is the table and time is the Axis (input).", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265396.0", "Description": "ADmdRaw must be comprehended as a table over a theoretical time, where ADmdRaw is the table and time is the Axis (input).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
64	16654198.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Phase 1: ADmdRaw must ramp from AVehFrz to LgtCtlD_AMinClc with the gradient of LgtCtlD_AGrd1. The duration of this phase must be Phase 1: ADmdRaw must ramp from AVehFrz to LgtCtlD_AMinClc with the gradient of LgtCtlD_AGrd1. The duration of this phase must be equal to Ti1. Raw { "ID": "16654198.0", "ASIL": " QM", "Text": "Phase 1: ADmdRaw must ramp from AVehFrz to LgtCtlD_AMinClc with the gradient of LgtCtlD_AGrd1. The duration of this phase must be equal to Ti1.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262844.0", "Description": "Phase 1: ADmdRaw must ramp from AVehFrz to LgtCtlD_AMinClc with the gradient of LgtCtlD_AGrd1. The duration of this phase must be equal to Ti1.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
65	16654199.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Phase 2: ADmdRaw must hold the value of LgtCtlD_AMinClc, which must be the last value of Phase 1. The duration of this phase Ti2 i Phase 2: ADmdRaw must hold the value of LgtCtlD_AMinClc, which must be the last value of Phase 1. The duration of this phase Ti2 is calculated by the following formula: Ti2 = abs((VVehFrz + LgtCtlD_AGrd10.5(Ti1)² + AVehFrzTi1 + LgtCtlD_AGrd30.5(Ti3)² + LgtCtlD_AMinClcTi3) / LgtCtlD_AMinClc) Threshold for Protected Division = 0.001 Raw { "ID": "16654199.0", "ASIL": " QM", "Text": "Phase 2: ADmdRaw must hold the value of LgtCtlD_AMinClc, which must be the last value of Phase 1. The duration of this phase Ti2 is calculated by the following formula:\n\rTi2 = abs((VVehFrz + LgtCtlD_AGrd10.5(Ti1)² + AVehFrzTi1 + LgtCtlD_AGrd30.5(Ti3)² + LgtCtlD_AMinClcTi3) / LgtCtlD_AMinClc)\n\r \n\r\n\rThreshold for Protected Division = 0.001", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262846.0", "Description": "Phase 2: ADmdRaw must hold the value of LgtCtlD_AMinClc, which must be the last value of Phase 1. The duration of this phase Ti2 is calculated by the following formula:\n\rTi2 = abs((VVehFrz + LgtCtlD_AGrd10.5(Ti1)² + AVehFrzTi1 + LgtCtlD_AGrd30.5(Ti3)² + LgtCtlD_AMinClcTi3) / LgtCtlD_AMinClc)\n\r \n\r\n\rThreshold for Protected Division = 0.001", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
66	16654200.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Phase 3: ADmdRaw must ramp from LgtCtlD_AMinClc to zero with the gradient of LgtCtlD_AGrd3. The duration of this phase must be eq Phase 3: ADmdRaw must ramp from LgtCtlD_AMinClc to zero with the gradient of LgtCtlD_AGrd3. The duration of this phase must be equal to Ti3. Raw { "ID": "16654200.0", "ASIL": " QM", "Text": "Phase 3: ADmdRaw must ramp from LgtCtlD_AMinClc to zero with the gradient of\n\rLgtCtlD_AGrd3. The duration of this phase must be equal to Ti3.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262854.0", "Description": "Phase 3: ADmdRaw must ramp from LgtCtlD_AMinClc to zero with the gradient of\n\rLgtCtlD_AGrd3. The duration of this phase must be equal to Ti3.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
67	16654201.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	LgtCtlD_DTotClc must be equal to the definite integral [of the sum of VVehFrz and the integral of ADmdRaw] where the intervals of LgtCtlD_DTotClc must be equal to the definite integral [of the sum of VVehFrz and the integral of ADmdRaw] where the intervals of both integral are [0,(Ti1+Ti2+Ti3)]. Raw { "ID": "16654201.0", "ASIL": " QM", "Text": "LgtCtlD_DTotClc must be equal to the definite integral [of the sum of VVehFrz and the integral of ADmdRaw] where the intervals of both integral are [0,(Ti1+Ti2+Ti3)].", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262857.0", "Description": "LgtCtlD_DTotClc must be equal to the definite integral [of the sum of VVehFrz and the integral of ADmdRaw] where the intervals of both integral are [0,(Ti1+Ti2+Ti3)].", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
68	16654202.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	If LgtCtlD_FlgDPlanAcv is not true (see following requirement EF_Component Requirement 1262873), the calculation of this definite If LgtCtlD_FlgDPlanAcv is not true (see following requirement EF_Component Requirement 1262873), the calculation of this definite integral EF_Component Requirement 1262857 must be executed each computation cycle and must be reset to zero at the beginning of each computation cycle. Raw { "ID": "16654202.0", "ASIL": " QM", "Text": "If LgtCtlD_FlgDPlanAcv is not true (see following requirement EF_Component Requirement 1262873), the calculation of this definite integral EF_Component Requirement 1262857 must be executed each computation cycle and must be reset to zero at the beginning of each computation cycle.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265638.0", "Description": "If LgtCtlD_FlgDPlanAcv is not true (see following requirement EF_Component Requirement 1262873), the calculation of this definite integral EF_Component Requirement 1262857 must be executed each computation cycle and must be reset to zero at the beginning of each computation cycle.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
69	16654203.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Triggers Triggers Raw { "ID": "16654203.0", "ASIL": " ", "Text": "Triggers", "Type": "Folder", "Status": "", "Summary": "Triggers", "Relevant": "no", "column_12": "", "Foreign ID": "1265363.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
70	16654204.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(AND(1,2,3),AND(2,3,4))] 1) LgtCtlD_DRem is smaller than or equal to LgtCtlD_DTotClc from the pevious computation cycle 2 IF[OR(AND(1,2,3),AND(2,3,4))] 1) LgtCtlD_DRem is smaller than or equal to LgtCtlD_DTotClc from the pevious computation cycle 2) TVCOP_s_LgtCtlD_FlgAcv is true 3) the by one computation cycle delayed signal LgtCtlD_DrvOffPsbl has no rising edge 4) LgtCtlD_FlgDPlanAcv was true in the previous computation cycle THEN: LgtCtlD_FlgDPlanAcv is true ELSE: LgtCtlD_FlgDPlanAcv is not true Raw { "ID": "16654204.0", "ASIL": " QM", "Text": "IF[OR(AND(1,2,3),AND(2,3,4))] \n\r1) LgtCtlD_DRem is smaller than or equal to LgtCtlD_DTotClc from the pevious computation cycle \n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) the by one computation cycle delayed signal LgtCtlD_DrvOffPsbl has no rising edge\n\r4) LgtCtlD_FlgDPlanAcv was true in the previous computation cycle\n\rTHEN:\n\rLgtCtlD_FlgDPlanAcv is true\n\rELSE:\n\rLgtCtlD_FlgDPlanAcv is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262873.0", "Description": "IF[OR(AND(1,2,3),AND(2,3,4))] \n\r1) LgtCtlD_DRem is smaller than or equal to LgtCtlD_DTotClc from the pevious computation cycle \n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r3) the by one computation cycle delayed signal LgtCtlD_DrvOffPsbl has no rising edge\n\r4) LgtCtlD_FlgDPlanAcv was true in the previous computation cycle\n\rTHEN:\n\rLgtCtlD_FlgDPlanAcv is true\n\rELSE:\n\rLgtCtlD_FlgDPlanAcv is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
71	22439382.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND[1,2]] 1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true 2) TVCOP_s_LgtCtlD_FlgAcv is true THEN: LgtCtlD_FlgDPlanAcv is true EL IF[AND[1,2]] 1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true 2) TVCOP_s_LgtCtlD_FlgAcv is true THEN: LgtCtlD_FlgDPlanAcv is true ELSE: LgtCtlD_FlgDPlanAcv is not true Raw { "ID": "22439382.0", "ASIL": " QM", "Text": "IF[AND[1,2]] \n\r1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDPlanAcv is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDPlanAcv is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND[1,2]] \n\r1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDPlanAcv is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDPlanAcv is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
72	36732630.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND[1,2]] 1) LgtCtlV_FlgAcvStopDCtl is true 2) TVCOP_s_LgtCtlD_FlgAcv is true THEN: LgtCtlD_FlgDPlanAcv is true ELSE: Lg IF[AND[1,2]] 1) LgtCtlV_FlgAcvStopDCtl is true 2) TVCOP_s_LgtCtlD_FlgAcv is true THEN: LgtCtlD_FlgDPlanAcv is true ELSE: LgtCtlD_FlgDPlanAcv is not true Raw { "ID": "36732630.0", "ASIL": " QM", "Text": "IF[AND[1,2]] \n\r1) LgtCtlV_FlgAcvStopDCtl is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDPlanAcv is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDPlanAcv is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND[1,2]] \n\r1) LgtCtlV_FlgAcvStopDCtl is true\n\r2) TVCOP_s_LgtCtlD_FlgAcv is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDPlanAcv is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDPlanAcv is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
73	16654205.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,NOT(AND(3,4))] 1) LgtCtlD_FlgDPlanAcv is true 2) LOCDC_s_LgtCtlV_FlgAcvStopLoV is false 3) LgtCtlD_FlgChg is true IF[AND(1,2,NOT(AND(3,4))] 1) LgtCtlD_FlgDPlanAcv is true 2) LOCDC_s_LgtCtlV_FlgAcvStopLoV is false 3) LgtCtlD_FlgChg is true 4) FlgTrig was true in the previous computation cycle (initial value of the delayed FlgTrig is zero) THEN: FlgTrig is true ELSE: FlgTrig is not true Raw { "ID": "16654205.0", "ASIL": " QM", "Text": "IF[AND(1,2,NOT(AND(3,4))] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LOCDC_s_LgtCtlV_FlgAcvStopLoV is false\n\r3) LgtCtlD_FlgChg is true\n\r4) FlgTrig was true in the previous computation cycle (initial value of the delayed FlgTrig is zero)\n\rTHEN:\n\rFlgTrig is true\n\rELSE:\n\rFlgTrig is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262879.0", "Description": "IF[AND(1,2,NOT(AND(3,4))] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LOCDC_s_LgtCtlV_FlgAcvStopLoV is false\n\r3) LgtCtlD_FlgChg is true\n\r4) FlgTrig was true in the previous computation cycle (initial value of the delayed FlgTrig is zero)\n\rTHEN:\n\rFlgTrig is true\n\rELSE:\n\rFlgTrig is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
74	16654206.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(AND(1,2,3,4,5,6), AND(5,6,7)] 1) LgtCtlD_FlgDPlanAcv is true 2) the by one computation cycle delayed signal VSOEM_s_StSd IF[OR(AND(1,2,3,4,5,6), AND(5,6,7)] 1) LgtCtlD_FlgDPlanAcv is true 2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl 3) LgtCtlD_DRem is greater than TVCOP_s_LgtCtlD_DTlrLo 4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff 5) LgtCtlD_DrvOffPsbl was true in the previous computation cycle 6) TVCOP_s_LgtCtlD_FlgAcv is true 7) LgtCtlD_FlgDPlanAcv has no rising edge THEN: LgtCtlD_DrvOffPsbl is true ELSE: LgtCtlD_DrvOffPsbl is not true initial condition: LgtCtlD_DrvOffPsbl is not false Raw { "ID": "16654206.0", "ASIL": " QM", "Text": "IF[OR(AND(1,2,3,4,5,6), AND(5,6,7)] \n\r1) LgtCtlD_FlgDPlanAcv is true \n\r2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl\n\r3) LgtCtlD_DRem is greater than TVCOP_s_LgtCtlD_DTlrLo\n\r4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff\n\r5) LgtCtlD_DrvOffPsbl was true in the previous computation cycle\n\r6) TVCOP_s_LgtCtlD_FlgAcv is true\n\r7) LgtCtlD_FlgDPlanAcv has no rising edge\n\rTHEN:\n\rLgtCtlD_DrvOffPsbl is true\n\rELSE:\n\rLgtCtlD_DrvOffPsbl is not true\n\rinitial condition: \n\rLgtCtlD_DrvOffPsbl is not false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1273031.0", "Description": "IF[OR(AND(1,2,3,4,5,6), AND(5,6,7)] \n\r1) LgtCtlD_FlgDPlanAcv is true \n\r2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl\n\r3) LgtCtlD_DRem is greater than TVCOP_s_LgtCtlD_DTlrLo\n\r4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff\n\r5) LgtCtlD_DrvOffPsbl was true in the previous computation cycle\n\r6) TVCOP_s_LgtCtlD_FlgAcv is true\n\r7) LgtCtlD_FlgDPlanAcv has no rising edge\n\rTHEN:\n\rLgtCtlD_DrvOffPsbl is true\n\rELSE:\n\rLgtCtlD_DrvOffPsbl is not true\n\rinitial condition: \n\rLgtCtlD_DrvOffPsbl is not false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
75	22432480.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] 1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true 2) the by one computation cycle delayed si IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] 1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true 2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl 3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo) 4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff 5) TVCOP_s_LgtCtlD_FlgAcv is true 6) LOCDC_s_LgtCtlV_FlgAcvStopLoV has no rising edge 7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge 8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false 9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle THEN: LgtCtlD_DrvOffPsbl is true ELSE: LgtCtlD_DrvOffPsbl is not true initial condition: LgtCtlD_DrvOffPsbl is not false Raw { "ID": "22432480.0", "ASIL": " QM", "Text": "IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] \n\r1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true\n\r2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl\n\r3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo)\n\r4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff\n\r5) TVCOP_s_LgtCtlD_FlgAcv is true\n\r6) LOCDC_s_LgtCtlV_FlgAcvStopLoV\n\rhas no rising edge\n\r7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge\n\r8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false\n\r9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle\n\r \n\rTHEN:\n\rLgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_DrvOffPsbl is not true\n\r \n\r \n\rinitial condition: \n\rLgtCtlD_DrvOffPsbl is not false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] \n\r1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is true\n\r2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl\n\r3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo)\n\r4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff\n\r5) TVCOP_s_LgtCtlD_FlgAcv is true\n\r6) LOCDC_s_LgtCtlV_FlgAcvStopLoV\n\rhas no rising edge\n\r7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge\n\r8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false\n\r9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle\n\r \n\rTHEN:\n\rLgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_DrvOffPsbl is not true\n\r \n\r \n\rinitial condition: \n\rLgtCtlD_DrvOffPsbl is not false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
76	36732673.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] 1) LgtCtlV_FlgAcvStopDCtl is true 2) the by one computation cycle delayed signal VS IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] 1) LgtCtlV_FlgAcvStopDCtl is true 2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl 3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo) 4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff 5) TVCOP_s_LgtCtlD_FlgAcv is true 6) LgtCtlV_FlgAcvStopDCtl has no rising edge 7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge 8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false 9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle THEN: LgtCtlD_DrvOffPsbl is true ELSE: LgtCtlD_DrvOffPsbl is not true initial condition: LgtCtlD_DrvOffPsbl is not false Raw { "ID": "36732673.0", "ASIL": " QM", "Text": "IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] \n\r1) LgtCtlV_FlgAcvStopDCtl is true\n\r2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl\n\r3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo)\n\r4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff\n\r5) TVCOP_s_LgtCtlD_FlgAcv is true\n\r6) LgtCtlV_FlgAcvStopDCtl \n\rhas no rising edge\n\r7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge\n\r8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false\n\r9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle\n\r \n\rTHEN:\n\rLgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_DrvOffPsbl is not true\n\r \n\r \n\rinitial condition: \n\rLgtCtlD_DrvOffPsbl is not false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[OR(AND(1,2,3,4,5,6,7,8), AND(5,6,7,8,9)] \n\r1) LgtCtlV_FlgAcvStopDCtl is true\n\r2) the by one computation cycle delayed signal VSOEM_s_StSdsl is equal to VMMP_VSOEM_c_StSdslSdsl\n\r3) LgtCtlD_DRem is greater than MAX(TVCOP_s_LgtCtlD_DTlrLo,VMMP_LOCDC_p_LgtCtlD_DMinTlrLo)\n\r4) DSOPOST_s_BrkPed_ItDmdNrm is smaller than or equal to VMMP_LOCDC_p_ItBrkPedDCtlDrvOff\n\r5) TVCOP_s_LgtCtlD_FlgAcv is true\n\r6) LgtCtlV_FlgAcvStopDCtl \n\rhas no rising edge\n\r7) TVCOP_s_LgtCtlD_FlgUpd has no rising edge\n\r8) LOCDC_s_LgtCtlV_FlgCnclDrvOff is false\n\r9) LgtCtlD_DrvOffPsbl was true in the previous computation cycle\n\r \n\rTHEN:\n\rLgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_DrvOffPsbl is not true\n\r \n\r \n\rinitial condition: \n\rLgtCtlD_DrvOffPsbl is not false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
77	16654207.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)] 1) LgtCtlD_FlgDPlanAcv is not true 2) LgtCtlD_DrvOffPsbl is true THEN: LgtCtlD_FlgDrvOff is true ELSE: LgtCtlD_ IF[AND(1,2)] 1) LgtCtlD_FlgDPlanAcv is not true 2) LgtCtlD_DrvOffPsbl is true THEN: LgtCtlD_FlgDrvOff is true ELSE: LgtCtlD_FlgDrvOff is not true Raw { "ID": "16654207.0", "ASIL": " QM", "Text": "IF[AND(1,2)]\n\r1) LgtCtlD_FlgDPlanAcv is not true\n\r2) LgtCtlD_DrvOffPsbl is true\n\rTHEN:\n\rLgtCtlD_FlgDrvOff is true\n\rELSE:\n\rLgtCtlD_FlgDrvOff is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1273029.0", "Description": "IF[AND(1,2)]\n\r1) LgtCtlD_FlgDPlanAcv is not true\n\r2) LgtCtlD_DrvOffPsbl is true\n\rTHEN:\n\rLgtCtlD_FlgDrvOff is true\n\rELSE:\n\rLgtCtlD_FlgDrvOff is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
78	22439460.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)] 1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is not true 2) LgtCtlD_DrvOffPsbl is true THEN: LgtCtlD_FlgDrvOff is true ELSE: IF[AND(1,2)] 1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is not true 2) LgtCtlD_DrvOffPsbl is true THEN: LgtCtlD_FlgDrvOff is true ELSE: LgtCtlD_FlgDrvOff is false Raw { "ID": "22439460.0", "ASIL": " QM", "Text": "IF[AND(1,2)]\n\r1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is not true\n\r2) LgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDrvOff is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDrvOff is false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2)]\n\r1) LOCDC_s_LgtCtlV_FlgAcvStopLoV is not true\n\r2) LgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDrvOff is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDrvOff is false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
79	36732706.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)] 1) LgtCtlV_FlgAcvStopDCtl is not true 2) LgtCtlD_DrvOffPsbl is true THEN: LgtCtlD_FlgDrvOff is true ELSE: LgtCt IF[AND(1,2)] 1) LgtCtlV_FlgAcvStopDCtl is not true 2) LgtCtlD_DrvOffPsbl is true THEN: LgtCtlD_FlgDrvOff is true ELSE: LgtCtlD_FlgDrvOff is false Raw { "ID": "36732706.0", "ASIL": " QM", "Text": "IF[AND(1,2)]\n\r1) LgtCtlV_FlgAcvStopDCtl is not true\n\r2) LgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDrvOff is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDrvOff is false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF[AND(1,2)]\n\r1) LgtCtlV_FlgAcvStopDCtl is not true\n\r2) LgtCtlD_DrvOffPsbl is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_FlgDrvOff is true\n\r \n\r \n\rELSE:\n\rLgtCtlD_FlgDrvOff is false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
80	22420927.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [AND(1,2,3,OR(4,5,6))] 1) TVCOP_s_LgtCtlD_FlgAcv is true 2) LgtCtlD_DTar delayed by one computation cycle is greater than -1 IF [AND(1,2,3,OR(4,5,6))] 1) TVCOP_s_LgtCtlD_FlgAcv is true 2) LgtCtlD_DTar delayed by one computation cycle is greater than -1 3) LgtCtlD_DrvOffPsbl from last computation cycle has no rising edge 4) LgtCtlD_FlgUpd is false 5) TVCOP_s_LgtCtlD_DTar is smaller than or equal to DToStop from the last computation cycle 6) LgtCtlD_DTar is smaller than or equal to (VMMP_LOC_p_LgtD_DDifAFrz +2VMMP_c_TiSmplVSOEM_s_VLgtVehCor+2VMMP_c_TiSmpl^2VSOEM_s_ALgtVehCor) THEN: FlgReqAcv is true ELSE: FlgReqAcv is false Raw { "ID": "22420927.0", "ASIL": " QM", "Text": "IF [AND(1,2,3,OR(4,5,6))]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is true\n\r2) LgtCtlD_DTar delayed by one computation cycle is greater than -1\n\r3) LgtCtlD_DrvOffPsbl from last computation cycle has no rising edge\n\r4) LgtCtlD_FlgUpd is false\n\r5) TVCOP_s_LgtCtlD_DTar is smaller than or equal to DToStop from the last computation cycle\n\r6) LgtCtlD_DTar is smaller than or equal to (VMMP_LOC_p_LgtD_DDifAFrz +2VMMP_c_TiSmplVSOEM_s_VLgtVehCor+2VMMP_c_TiSmpl^2VSOEM_s_ALgtVehCor)\n\r \n\rTHEN:\n\rFlgReqAcv is true\n\r \n\r \n\rELSE:\n\rFlgReqAcv is false", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "IF [AND(1,2,3,OR(4,5,6))]\n\r1) TVCOP_s_LgtCtlD_FlgAcv is true\n\r2) LgtCtlD_DTar delayed by one computation cycle is greater than -1\n\r3) LgtCtlD_DrvOffPsbl from last computation cycle has no rising edge\n\r4) LgtCtlD_FlgUpd is false\n\r5) TVCOP_s_LgtCtlD_DTar is smaller than or equal to DToStop from the last computation cycle\n\r6) LgtCtlD_DTar is smaller than or equal to (VMMP_LOC_p_LgtD_DDifAFrz +2VMMP_c_TiSmplVSOEM_s_VLgtVehCor+2VMMP_c_TiSmpl^2VSOEM_s_ALgtVehCor)\n\r \n\rTHEN:\n\rFlgReqAcv is true\n\r \n\r \n\rELSE:\n\rFlgReqAcv is false", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
81	16654208.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Freezes Freezes Raw { "ID": "16654208.0", "ASIL": " ", "Text": "Freezes", "Type": "Folder", "Status": "", "Summary": "Freezes", "Relevant": "no", "column_12": "", "Foreign ID": "1265365.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
82	19536862.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)] 1)VSOEM_s_VLgtVehCor is smaller than VMMP_LOCDC_p_VThSwtARef 2)VMMP_LOCDC_p_SwtARefToALgtVehCor is true THEN: ARe IF[AND(1,2)] 1)VSOEM_s_VLgtVehCor is smaller than VMMP_LOCDC_p_VThSwtARef 2)VMMP_LOCDC_p_SwtARefToALgtVehCor is true THEN: ARef is equal to VSOEM_s_ALgtVehCor ELSE: ARef is equal to ASOPOT_s_ATqDmd Raw { "ID": "19536862.0", "ASIL": " QM", "Text": "IF[AND(1,2)]\n\r1)VSOEM_s_VLgtVehCor is smaller than VMMP_LOCDC_p_VThSwtARef\n\r2)VMMP_LOCDC_p_SwtARefToALgtVehCor is true\n\rTHEN:\n\rARef is equal to VSOEM_s_ALgtVehCor\n\r \n\rELSE:\n\rARef is equal to ASOPOT_s_ATqDmd", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1535801.0", "Description": "IF[AND(1,2)]\n\r1)VSOEM_s_VLgtVehCor is smaller than VMMP_LOCDC_p_VThSwtARef\n\r2)VMMP_LOCDC_p_SwtARefToALgtVehCor is true\n\rTHEN:\n\rARef is equal to VSOEM_s_ALgtVehCor\n\r \n\rELSE:\n\rARef is equal to ASOPOT_s_ATqDmd", "Vehicle Launch": "", "Vehicle Platform": "" }
83	19536863.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[OR(1,2)] 1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv 2)Condition 1 changes from true to false for not longer than 2VMMP_c_ IF[OR(1,2)] 1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv 2)Condition 1 changes from true to false for not longer than 2VMMP_c_TiSmpl THEN: ADmdIniUpd must be equal to ADmdIniUpd from the previous computation cycle with the initial value of zero. VDmdIniUpd must be equal to VDmdIniUpd from the previous computation cycle with the initial value of zero. ELSE: ADmdIniUpd must be equal to LgtCtlD_ADmd from the previous computation cycle VDmdIniUpd must be equal to LgtCtlD_VDmd from the previous computation cycle Raw { "ID": "19536863.0", "ASIL": " QM", "Text": "IF[OR(1,2)]\n\r1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv\n\r2)Condition 1 changes from true to false for not longer than 2VMMP_c_TiSmpl\n\rTHEN:\n\rADmdIniUpd must be equal to ADmdIniUpd from the previous computation cycle with the initial value of zero.\n\rVDmdIniUpd must be equal to VDmdIniUpd from the previous computation cycle with the initial value of zero.\n\r \n\rELSE:\n\rADmdIniUpd must be equal to LgtCtlD_ADmd from the previous computation cycle\n\rVDmdIniUpd must be equal to LgtCtlD_VDmd from the previous computation cycle", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1535820.0", "Description": "IF[OR(1,2)]\n\r1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv\n\r2)Condition 1 changes from true to false for not longer than 2VMMP_c_TiSmpl\n\rTHEN:\n\rADmdIniUpd must be equal to ADmdIniUpd from the previous computation cycle with the initial value of zero.\n\rVDmdIniUpd must be equal to VDmdIniUpd from the previous computation cycle with the initial value of zero.\n\r \n\rELSE:\n\rADmdIniUpd must be equal to LgtCtlD_ADmd from the previous computation cycle\n\rVDmdIniUpd must be equal to LgtCtlD_VDmd from the previous computation cycle", "Vehicle Launch": "", "Vehicle Platform": "" }
84	16654209.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[1] 1) FlgTrig is true THEN: AVehFrz must be equal to AVehFrz delayed by one computation cycle with the initial value of ARef IF[1] 1) FlgTrig is true THEN: AVehFrz must be equal to AVehFrz delayed by one computation cycle with the initial value of ARef VVehFrz must be equal to VVehFrz delayed by one computation cycle with the initial value of VSOEM_s_VLgtVehCor ELSEIF[OR(1,2)] 1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv 2)Condition 1 changes from true to false for not longer than 2VMMP_c_TiSmpl THEN: AVehFrz must be equal ADmdIniUpd VVehFrz must be equal VDmdIniUpd ELSE: AVehFrz must be equal ARef VVehFrz must be equal VSOEM_s_VLgtVehCor Raw { "ID": "16654209.0", "ASIL": " QM", "Text": "IF[1]\n\r1) FlgTrig is true\n\rTHEN:\n\rAVehFrz must be equal to AVehFrz delayed by one computation cycle with the initial value of ARef\n\rVVehFrz must be equal to VVehFrz delayed by one computation cycle with the initial value of VSOEM_s_VLgtVehCor\n\r \n\rELSEIF[OR(1,2)]\n\r1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv\n\r2)Condition 1 changes from true to false for not longer than 2VMMP_c_TiSmpl\n\r \n\rTHEN:\n\rAVehFrz must be equal ADmdIniUpd\n\rVVehFrz must be equal VDmdIniUpd\n\r \n\r\n\rELSE:\n\rAVehFrz must be equal ARef\n\rVVehFrz must be equal VSOEM_s_VLgtVehCor", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265333.0", "Description": "IF[1]\n\r1) FlgTrig is true\n\rTHEN:\n\rAVehFrz must be equal to AVehFrz delayed by one computation cycle with the initial value of ARef\n\rVVehFrz must be equal to VVehFrz delayed by one computation cycle with the initial value of VSOEM_s_VLgtVehCor\n\r \n\rELSEIF[OR(1,2)]\n\r1)FlgTrig is not equal to LgtCtlD_FlgDPlanAcv\n\r2)Condition 1 changes from true to false for not longer than 2*VMMP_c_TiSmpl\n\r \n\rTHEN:\n\rAVehFrz must be equal ADmdIniUpd\n\rVVehFrz must be equal VDmdIniUpd\n\r \n\r\n\rELSE:\n\rAVehFrz must be equal ARef\n\rVVehFrz must be equal VSOEM_s_VLgtVehCor", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
85	16654210.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)] 1) LgtCtlD_FlgChg is not true 2) FlgTrig is true THEN: DRemFrz is equal to DRemFrz from the previous computation IF[AND(1,2)] 1) LgtCtlD_FlgChg is not true 2) FlgTrig is true THEN: DRemFrz is equal to DRemFrz from the previous computation cycle with initial value zero ELSE: DRemFrz is equal to LgtCtlD_DRem Raw { "ID": "16654210.0", "ASIL": " QM", "Text": "IF[AND(1,2)] \n\r1) LgtCtlD_FlgChg is not true\n\r2) FlgTrig is true\n\rTHEN:\n\rDRemFrz is equal to DRemFrz from the previous computation cycle with initial value zero\n\rELSE:\n\rDRemFrz is equal to LgtCtlD_DRem", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265250.0", "Description": "IF[AND(1,2)] \n\r1) LgtCtlD_FlgChg is not true\n\r2) FlgTrig is true\n\rTHEN:\n\rDRemFrz is equal to DRemFrz from the previous computation cycle with initial value zero\n\rELSE:\n\rDRemFrz is equal to LgtCtlD_DRem", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
86	16654211.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	SoftBrk Detection SoftBrk Detection Raw { "ID": "16654211.0", "ASIL": " ", "Text": "SoftBrk Detection", "Type": "Folder", "Status": "", "Summary": "SoftBrk Detection", "Relevant": "no", "column_12": "", "Foreign ID": "1265372.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
87	16654212.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[1] 1) FlgTrig is not equal to LgtCtlD_FlgDPlanAcv THEN: FlgTrigCmp is true ELSE: FlgTrigCmp is not true IF[1] 1) FlgTrig is not equal to LgtCtlD_FlgDPlanAcv THEN: FlgTrigCmp is true ELSE: FlgTrigCmp is not true Raw { "ID": "16654212.0", "ASIL": " QM", "Text": "IF[1] \n\r1) FlgTrig is not equal to LgtCtlD_FlgDPlanAcv\n\r \n\rTHEN: \n\rFlgTrigCmp is true\n\rELSE:\n\rFlgTrigCmp is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265253.0", "Description": "IF[1] \n\r1) FlgTrig is not equal to LgtCtlD_FlgDPlanAcv\n\r \n\rTHEN: \n\rFlgTrigCmp is true\n\rELSE:\n\rFlgTrigCmp is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
88	16654213.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(OR(AND(1,2),3),4,AND(NOT(1),2))] 1) FlgTrigCmp is true 2) LgtCtlD_DTar is greater than the value of LgtCtlD_DRem delayed IF[AND(OR(AND(1,2),3),4,AND(NOT(1),2))] 1) FlgTrigCmp is true 2) LgtCtlD_DTar is greater than the value of LgtCtlD_DRem delayed by one computation cycle with initial value zero 3) LgtCtlD_FlgSoftBrkTrj was true in the previous computation cycle 4) LgtCtlD_FlgDPlanAcv is true THEN: LgtCtlD_FlgSoftBrkTrj is true ELSE: LgtCtlD_FlgSoftBrkTrj is not true Raw { "ID": "16654213.0", "ASIL": " QM", "Text": "IF[AND(OR(AND(1,2),3),4,AND(NOT(1),2))]\n\r1) FlgTrigCmp is true\n\r2) LgtCtlD_DTar is greater than the value of LgtCtlD_DRem delayed by one computation cycle with initial value zero\n\r3) LgtCtlD_FlgSoftBrkTrj was true in the previous computation cycle\n\r4) LgtCtlD_FlgDPlanAcv is true\n\rTHEN: \n\rLgtCtlD_FlgSoftBrkTrj is true\n\rELSE:\n\rLgtCtlD_FlgSoftBrkTrj is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265346.0", "Description": "IF[AND(OR(AND(1,2),3),4,AND(NOT(1),2))]\n\r1) FlgTrigCmp is true\n\r2) LgtCtlD_DTar is greater than the value of LgtCtlD_DRem delayed by one computation cycle with initial value zero\n\r3) LgtCtlD_FlgSoftBrkTrj was true in the previous computation cycle\n\r4) LgtCtlD_FlgDPlanAcv is true\n\rTHEN: \n\rLgtCtlD_FlgSoftBrkTrj is true\n\rELSE:\n\rLgtCtlD_FlgSoftBrkTrj is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
89	16654214.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Iteration Iteration Raw { "ID": "16654214.0", "ASIL": " ", "Text": "Iteration", "Type": "Folder", "Status": "", "Summary": "Iteration", "Relevant": "no", "column_12": "", "Foreign ID": "1265368.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
90	16654215.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2)] 1) the absolute of (the sum of DRemFrz and (-1)0.5VMMP_LOCDC_p_DTotClcIterAcu and ((-1)* LgtCtlD_DTotClc delayed IF[AND(1,2)] 1) the absolute of (the sum of DRemFrz and (-1)0.5VMMP_LOCDC_p_DTotClcIterAcu and ((-1)* LgtCtlD_DTotClc delayed by one computation cycle with initial value zero)) is greater than VMMP_LOCDC_p_DTotClcIterAcu 2) FlgTrig is true THEN: LgtCtlD_FlgIterCdn is true ELSE: LgtCtlD_FlgIterCdn is not true Raw { "ID": "16654215.0", "ASIL": " QM", "Text": "IF[AND(1,2)] \n\r1) the absolute of (the sum of DRemFrz and (-1)0.5VMMP_LOCDC_p_DTotClcIterAcu and ((-1)\n\rLgtCtlD_DTotClc delayed by one computation cycle with initial value zero)) is greater than\n\rVMMP_LOCDC_p_DTotClcIterAcu\n\r2) FlgTrig is true\n\r \n\rTHEN:\n\rLgtCtlD_FlgIterCdn is true\n\rELSE:\n\rLgtCtlD_FlgIterCdn is not true", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265255.0", "Description": "IF[AND(1,2)] \n\r1) the absolute of (the sum of DRemFrz and (-1)0.5VMMP_LOCDC_p_DTotClcIterAcu and ((-1)\n\rLgtCtlD_DTotClc delayed by one computation cycle with initial value zero)) is greater than\n\rVMMP_LOCDC_p_DTotClcIterAcu\n\r2) FlgTrig is true\n\r \n\rTHEN:\n\rLgtCtlD_FlgIterCdn is true\n\rELSE:\n\rLgtCtlD_FlgIterCdn is not true", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
91	16654216.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,3)] 1) LgtCtlD_FlgDPlanAcv is true 2) LgtCtlD_FlgIterCdn is true 3) LgtCtlD_FlgSoftBrkTrj is not true THEN: LgtC IF[AND(1,2,3)] 1) LgtCtlD_FlgDPlanAcv is true 2) LgtCtlD_FlgIterCdn is true 3) LgtCtlD_FlgSoftBrkTrj is not true THEN: LgtCtlD_AMinClc is decreased by iteration and must be smaller than Lookuptable Input: VSOEM_s_VLgtVehCor Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh Parameter for output: VMMP_LOCDC_p1_AMin LgtCtlD_AMinClc is negative LgtCtlD_AGrd1 is decreased by iteration and must be smaller than VMMP_LOCDC_p_AGrd1 LgtCtlD_AGrd1 is negative LgtCtlD_AGrd3 is increased by iteration and must be greater than VMMP_LOCDC_p_AGrd3 LgtCtlD_AGrd3 is positive With the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see EF_Component Requirement 1262844 EF_Component Requirement 1262846 EF_Component Requirement 1262854 Raw { "ID": "16654216.0", "ASIL": " QM", "Text": "IF[AND(1,2,3)] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LgtCtlD_FlgIterCdn is true\n\r3) LgtCtlD_FlgSoftBrkTrj is not true\n\rTHEN: \n\rLgtCtlD_AMinClc is decreased by iteration and must be smaller than\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r Parameter for output: VMMP_LOCDC_p1_AMin\n\rLgtCtlD_AMinClc is negative\n\rLgtCtlD_AGrd1 is decreased by iteration and must be smaller than\n\rVMMP_LOCDC_p_AGrd1\n\rLgtCtlD_AGrd1 is negative\n\rLgtCtlD_AGrd3 is increased by iteration and must be greater than\n\rVMMP_LOCDC_p_AGrd3\n\rLgtCtlD_AGrd3 is positive\n\r \n\r \n\rWith the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see\n\rEF_Component Requirement 1262844\n\rEF_Component Requirement 1262846\n\rEF_Component Requirement 1262854", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265344.0", "Description": "IF[AND(1,2,3)] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LgtCtlD_FlgIterCdn is true\n\r3) LgtCtlD_FlgSoftBrkTrj is not true\n\rTHEN: \n\rLgtCtlD_AMinClc is decreased by iteration and must be smaller than\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r Parameter for output: VMMP_LOCDC_p1_AMin\n\rLgtCtlD_AMinClc is negative\n\rLgtCtlD_AGrd1 is decreased by iteration and must be smaller than\n\rVMMP_LOCDC_p_AGrd1\n\rLgtCtlD_AGrd1 is negative\n\rLgtCtlD_AGrd3 is increased by iteration and must be greater than\n\rVMMP_LOCDC_p_AGrd3\n\rLgtCtlD_AGrd3 is positive\n\r \n\r \n\rWith the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see\n\rEF_Component Requirement 1262844\n\rEF_Component Requirement 1262846\n\rEF_Component Requirement 1262854", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
92	16654217.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,3,4)] 1) LgtCtlD_FlgDPlanAcv is true 2) LgtCtlD_FlgIterCdn is true 3) LgtCtlD_FlgSoftBrkTrj is true 4) VMMP_LOCDC_ IF[AND(1,2,3,4)] 1) LgtCtlD_FlgDPlanAcv is true 2) LgtCtlD_FlgIterCdn is true 3) LgtCtlD_FlgSoftBrkTrj is true 4) VMMP_LOCDC_p_SoftBrkTrjIterEna is true THEN: LgtCtlD_AMinClc is increased by iteration and must be greater than Lookuptable Input: VSOEM_s_VLgtVehCor Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh Parameter for output: VMMP_LOCDC_p1_AMin LgtCtlD_AMinClc is negative LgtCtlD_AGrd1 is increased by iteration and must be greater than VMMP_LOCDC_p_AGrd1 LgtCtlD_AGrd1 is positive LgtCtlD_AGrd3 is decreased by iteration and must be smaller than VMMP_LOCDC_p_AGrd3 LgtCtlD_AGrd3 is positive With the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see EF_Component Requirement 1262844 EF_Component Requirement 1262846 EF_Component Requirement 1262854 Raw { "ID": "16654217.0", "ASIL": " QM", "Text": "IF[AND(1,2,3,4)] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LgtCtlD_FlgIterCdn is true\n\r3) LgtCtlD_FlgSoftBrkTrj is true\n\r4) VMMP_LOCDC_p_SoftBrkTrjIterEna is true\n\rTHEN: \n\rLgtCtlD_AMinClc is increased by iteration and must be greater than\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r Parameter for output: VMMP_LOCDC_p1_AMin\n\rLgtCtlD_AMinClc is negative\n\rLgtCtlD_AGrd1 is increased by iteration and must be greater than\n\rVMMP_LOCDC_p_AGrd1\n\rLgtCtlD_AGrd1 is positive\n\rLgtCtlD_AGrd3 is decreased by iteration and must be smaller than\n\rVMMP_LOCDC_p_AGrd3\n\rLgtCtlD_AGrd3 is positive\n\r \n\r \n\rWith the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see\n\rEF_Component Requirement 1262844\n\rEF_Component Requirement 1262846\n\rEF_Component Requirement 1262854", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265335.0", "Description": "IF[AND(1,2,3,4)] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LgtCtlD_FlgIterCdn is true\n\r3) LgtCtlD_FlgSoftBrkTrj is true\n\r4) VMMP_LOCDC_p_SoftBrkTrjIterEna is true\n\rTHEN: \n\rLgtCtlD_AMinClc is increased by iteration and must be greater than\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r Parameter for output: VMMP_LOCDC_p1_AMin\n\rLgtCtlD_AMinClc is negative\n\rLgtCtlD_AGrd1 is increased by iteration and must be greater than\n\rVMMP_LOCDC_p_AGrd1\n\rLgtCtlD_AGrd1 is positive\n\rLgtCtlD_AGrd3 is decreased by iteration and must be smaller than\n\rVMMP_LOCDC_p_AGrd3\n\rLgtCtlD_AGrd3 is positive\n\r \n\r \n\rWith the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see\n\rEF_Component Requirement 1262844\n\rEF_Component Requirement 1262846\n\rEF_Component Requirement 1262854", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
93	16654218.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF[AND(1,2,OR(AND(3,4),AND(5,6)))] 1) LgtCtlD_FlgDPlanAcv is true 2) LgtCtlD_FlgIterCdn is true 3) LgtCtlD_FlgSoftBrkTrj is tr IF[AND(1,2,OR(AND(3,4),AND(5,6)))] 1) LgtCtlD_FlgDPlanAcv is true 2) LgtCtlD_FlgIterCdn is true 3) LgtCtlD_FlgSoftBrkTrj is true 4) VMMP_LOCDC_p_SoftBrkTrjIterEna is not true 5) LgtCtlD_FlgDPlanAcv has a rising edge 6) Ti2 delayed by two computation cycles (initial value zero) is greater than 0.2 THEN: LgtCtlD_AMinClc is increased by iteration and must be greater than Lookuptable Input: VSOEM_s_VLgtVehCor Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh Parameter for output: VMMP_LOCDC_p1_AMin LgtCtlD_AMinClc is negative LgtCtlD_AGrd1 is equal to (-1)VMMP_LOCDC_p_AGrd1 LgtCtlD_AGrd3 is equal to VMMP_LOCDC_p_AGrd3 With the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see EF_Component Requirement 1262844 EF_Component Requirement 1262846 EF_Component Requirement 1262854 Raw { "ID": "16654218.0", "ASIL": " QM", "Text": "IF[AND(1,2,OR(AND(3,4),AND(5,6)))] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LgtCtlD_FlgIterCdn is true\n\r3) LgtCtlD_FlgSoftBrkTrj is true\n\r4) VMMP_LOCDC_p_SoftBrkTrjIterEna is not true\n\r5) LgtCtlD_FlgDPlanAcv has a rising edge\n\r6) Ti2 delayed by two computation cycles (initial value zero) is greater than 0.2\n\rTHEN: \n\rLgtCtlD_AMinClc is increased by iteration and must be greater than\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r Parameter for output: VMMP_LOCDC_p1_AMin\n\rLgtCtlD_AMinClc is negative\n\rLgtCtlD_AGrd1 is equal to (-1)VMMP_LOCDC_p_AGrd1\n\rLgtCtlD_AGrd3 is equal to VMMP_LOCDC_p_AGrd3\n\r \n\r \n\rWith the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see\n\rEF_Component Requirement 1262844\n\rEF_Component Requirement 1262846\n\rEF_Component Requirement 1262854", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265337.0", "Description": "IF[AND(1,2,OR(AND(3,4),AND(5,6)))] \n\r1) LgtCtlD_FlgDPlanAcv is true\n\r2) LgtCtlD_FlgIterCdn is true\n\r3) LgtCtlD_FlgSoftBrkTrj is true\n\r4) VMMP_LOCDC_p_SoftBrkTrjIterEna is not true\n\r5) LgtCtlD_FlgDPlanAcv has a rising edge\n\r6) Ti2 delayed by two computation cycles (initial value zero) is greater than 0.2\n\rTHEN: \n\rLgtCtlD_AMinClc is increased by iteration and must be greater than\n\rLookuptable\n\r Input: VSOEM_s_VLgtVehCor\n\r Parameter Input-axis: VMMP_LOCDC_px_VLgtVeh\n\r Parameter for output: VMMP_LOCDC_p1_AMin\n\rLgtCtlD_AMinClc is negative\n\rLgtCtlD_AGrd1 is equal to (-1)*VMMP_LOCDC_p_AGrd1\n\rLgtCtlD_AGrd3 is equal to VMMP_LOCDC_p_AGrd3\n\r \n\r \n\rWith the new values of LgtCtlD_AMinClc, LgtCtlD_AGrd1 and LgtCtlD_AGrd3, ADmdRaw is updated in the identical computation cycle, see\n\rEF_Component Requirement 1262844\n\rEF_Component Requirement 1262846\n\rEF_Component Requirement 1262854", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
94	16654219.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Range of values Range of values Raw { "ID": "16654219.0", "ASIL": " ", "Text": "Range of values", "Type": "Folder", "Status": "", "Summary": "Range of values", "Relevant": "no", "column_12": "", "Foreign ID": "1266873.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
95	16654220.0	Non-functional	Released	no	False	type_not_target, relevance_filtered	Due to functional design, if one of the following conditions is not true, the behaviour of this modules output (LOCDC) is not rele Due to functional design, if one of the following conditions is not true, the behaviour of this modules output (LOCDC) is not relevant: LgtCtlD_AMinClc < -6 abs(LgtCtlD_AGrd1) < abs(VMMP_LOCDC_p_AGrd1IterTh) LgtCtlD_AGrd3 < VMMP_LOCDC_p_AGrd3IterTh Raw { "ID": "16654220.0", "ASIL": " QM", "Text": "Due to functional design, if one of the following conditions is not true, the behaviour of this modules output (LOCDC) is not relevant:\n\rLgtCtlD_AMinClc < -6\n\rabs(LgtCtlD_AGrd1) < abs(VMMP_LOCDC_p_AGrd1IterTh)\n\rLgtCtlD_AGrd3 < VMMP_LOCDC_p_AGrd3IterTh", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1266871.0", "Description": "Due to functional design, if one of the following conditions is not true, the behaviour of this modules output (LOCDC) is not relevant:\n\rLgtCtlD_AMinClc < -6\n\rabs(LgtCtlD_AGrd1) < abs(VMMP_LOCDC_p_AGrd1IterTh)\n\rLgtCtlD_AGrd3 < VMMP_LOCDC_p_AGrd3IterTh", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
96	16654221.0	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Output Calculation Output Calculation Raw { "ID": "16654221.0", "ASIL": " ", "Text": "Output Calculation", "Type": "Folder", "Status": "", "Summary": "Output Calculation", "Relevant": "no", "column_12": "", "Foreign ID": "1265661.0", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
97	16654222.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [1] 1) FlgTrig is true THEN: TiAbs is equal to the sum of TiAbs delayed by one computation cycle (initial value is zero) and IF [1] 1) FlgTrig is true THEN: TiAbs is equal to the sum of TiAbs delayed by one computation cycle (initial value is zero) and VMMP_c_TiSmpl. ELSE: TiAbs is equal to zero Raw { "ID": "16654222.0", "ASIL": " QM", "Text": "IF [1]\n\r1) FlgTrig is true\n\rTHEN:\n\rTiAbs is equal to the sum of TiAbs delayed by one computation cycle (initial value is zero) and VMMP_c_TiSmpl.\n\rELSE:\n\rTiAbs is equal to zero", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265631.0", "Description": "IF [1]\n\r1) FlgTrig is true\n\rTHEN:\n\rTiAbs is equal to the sum of TiAbs delayed by one computation cycle (initial value is zero) and VMMP_c_TiSmpl.\n\rELSE:\n\rTiAbs is equal to zero", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
98	16654223.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	IF [1] 1) LgtCtlD_FlgDPlanAcv is true THEN: LgtCtlD_ADmd must be equal to the look up of the table ADmdRaw by using TiAbs as Ax IF [1] 1) LgtCtlD_FlgDPlanAcv is true THEN: LgtCtlD_ADmd must be equal to the look up of the table ADmdRaw by using TiAbs as Axis (input), see EF_Component Requirement 1265396 with a tolerance of +- 10%. ELSE: LgtCtlD_ADmd must be equal to zero Raw { "ID": "16654223.0", "ASIL": " QM", "Text": "IF [1]\n\r1) LgtCtlD_FlgDPlanAcv is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_ADmd must be equal to the look up of the table ADmdRaw by using TiAbs as Axis (input), see EF_Component Requirement 1265396\n\rwith a tolerance of +- 10%.\n\r \n\r \n\rELSE:\n\rLgtCtlD_ADmd must be equal to zero", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1262916.0", "Description": "IF [1]\n\r1) LgtCtlD_FlgDPlanAcv is true\n\r \n\r \n\rTHEN:\n\rLgtCtlD_ADmd must be equal to the look up of the table ADmdRaw by using TiAbs as Axis (input), see EF_Component Requirement 1265396\n\rwith a tolerance of +- 10%.\n\r \n\r \n\rELSE:\n\rLgtCtlD_ADmd must be equal to zero", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
99	16654224.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	In Phase 3, see EF_Component Requirement 1262854 , LgtCtlD_ADmd must always be smaller than zero. In Phase 3, see EF_Component Requirement 1262854 , LgtCtlD_ADmd must always be smaller than zero. Raw { "ID": "16654224.0", "ASIL": " QM", "Text": "In Phase 3, see EF_Component Requirement 1262854 ,\n\rLgtCtlD_ADmd must always be smaller than zero.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265659.0", "Description": "In Phase 3, see EF_Component Requirement 1262854 ,\n\rLgtCtlD_ADmd must always be smaller than zero.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
100	16654225.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	LgtCtlD_VDmd must be equal to the derivative of LgtCtlD_ADmd with a tolerance of +- 3%. LgtCtlD_VDmd must be equal to the derivative of LgtCtlD_ADmd with a tolerance of +- 3%. Raw { "ID": "16654225.0", "ASIL": " QM", "Text": "LgtCtlD_VDmd must be equal to the derivative of LgtCtlD_ADmd with a tolerance of +- 3%.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1249643.0", "Description": "LgtCtlD_VDmd must be equal to the derivative of LgtCtlD_ADmd with a tolerance of +- 3%.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
101	16654226.0	Pre Condition	Released	no	False	type_not_target, relevance_filtered	LgtCtlD_DDmd must be equal to the derivative of LgtCtlD_VDmd with a tolerance of +- 2%. LgtCtlD_DDmd must be equal to the derivative of LgtCtlD_VDmd with a tolerance of +- 2%. Raw { "ID": "16654226.0", "ASIL": " QM", "Text": "LgtCtlD_DDmd must be equal to the derivative of LgtCtlD_VDmd with a tolerance of +- 2%.", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1265817.0", "Description": "LgtCtlD_DDmd must be equal to the derivative of LgtCtlD_VDmd with a tolerance of +- 2%.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }