Source files

Mapping profiles

Import history

File	Kind	Rows	Checksum
VME-PROD-VehicleMotionManagement - VMMP_SOUT_SOUTACTR.xlsx	requirement	150	b6895303c455
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBWBA.xlsx	requirement	306	15cfacd2cebf
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBVSSAFE.xlsx	requirement	147	0a7549953b8d
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBVSPROD.xlsx	requirement	98	697822772eb7
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBVSP.xlsx	requirement	130	76b7c5e950f4
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBPCR.xlsx	requirement	181	d77ebb143af4
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBPA.xlsx	requirement	375	7e40223dc3ee
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBMKB.xlsx	requirement	69	9bb70958383c
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBLIM.xlsx	requirement	91	a827032ef61c
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBEPB.xlsx	requirement	146	3444a9f7b61e
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBEA.xlsx	requirement	185	bbac1783bdd1
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBCAA.xlsx	requirement	371	90af07d4f163
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBBCS.xlsx	requirement	179	4e29a12ccd7d
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBACC.xlsx	requirement	93	e7564e67700e
VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBACA.xlsx	requirement	276	e0768ad03f86
VME-PROD-VehicleMotionManagement - VMMP_SCM.xlsx	requirement	38	bbbab81c2523
VME-PROD-VehicleMotionManagement - VMMP_LOCC_LOCCTS.xlsx	requirement	198	7da0335fbeb2
VME-PROD-VehicleMotionManagement - VMMP_LOCC_LOCCTC.xlsx	requirement	968	200e999be5b2
VME-PROD-VehicleMotionManagement - VMMP_LOCC_LOCCOP.xlsx	requirement	111	a9fd31d42e32
VME-PROD-VehicleMotionManagement - VMMP_LOCC_LOCCDRC.xlsx	requirement	316	fc5d912c53e3

VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBACA.xlsx · source records


Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv

IF: 

CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

THEN: 

CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq

ELSEIF [AND(1,2)]: 

1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

2) Bit1 of BitwiseOR (

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) 

is set 

THEN: 

CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq

ELSE: 

CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv
Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq 

IF: 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi 

THEN: 

CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq

ELSE:

CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq
Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp 

IF:

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle

THEN:

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 1 (true)

ELSE:

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)
Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv 

IF:

Bit1 of BitwiseOR (

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc)

is set

THEN:

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

ELSE:

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 1 (true)
HndFre Service Bridge shall use Signalmonitoring with following signal assignment:

Input:

*TurnOff equal to CustFctIn_HndFreLatCtl_TurnOff

*FlgIniExcDet equal to CustFctIn_HndFreLatCtl_FlgIniExcDet

*FlgErrQlfAcv equal to CustFctIn_HndFreLatCtl_FlgErrQlfAcv

merged classifier

RangeCheck

Output:

CustFctOut_HndFre_StDiagEve_for_StVld equal to *StDiagEve
HndFre Specific Pre Conditions
The following pre conditions are part of the "HandFre Service Bridge" and describe the calculation of CustFctOut_HndFre_StDiagEve (based on CustFctOut_HndFre_StDiagEve_for_StVld and Signalmonitoring)

and the Steering-Substitute-Reaction.

The Steering-Substitute-Reaction ensures that CustFctIn_HndFre_StHndDet1 and CustFctOut_LatCtl_StAcv as well as all other outputs of the "HndFre Service Bridge" are frozen to the last valid value for 2.5 seconds.
CRC Evaluation
CRC Evaluation uses the following modul inputs:

* ACA_s_CrvtCtl_CrvtDmd (data typ single)

* ACA_s_CrvtCtl_CrvtGrdDmd (data typ single)

* ACA_s_HndFre_StHndDet1 (data typ uint8)

For testing the CRC Evaluation in CFBACA, the input signals ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd have to be calculate in the same way as ACA Customer Function will calculate the signals on HCP2. ACA_s_CrvtCtl_CrvtGrdDmd depends on ACA_s_CrvtCtl_CrvtDmd!

Therefore CrvtDmd_raw and ACA_s_HndFre_StHndDet1 define how ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd shall be calculated.

The following Pre Conditions describe how ACA Customer Function will calculate correct values of ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) and ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct).

If CrvtDmd_correct and CrvtGrdDmd_correct are applied as module inputs for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd, the CRC Evaluation will not detected CRC failures. If any other combination of ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd are applied, the CRC Evaluation will detected CRC failures.
The following Pre Conditions describe how CRC_signal_raw is calculated by CrvtDmd_raw and Counter.
Definition of CrvtDmd_raw

CrvtDmd_raw is an uint16 signal with a limited signal range of 0 to 64000.
Definition of Counter

Counter is an uint8 signal.

Counter starts at 0.

Counter starts counting when ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

Counter counts up by 1 at every time step while ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff.

Counter will be reset to 0 if ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff.
Calculation of CRC_signal_raw (CRC 8Bit signal)

(Note: Calculation is decribed by different calculation steps and interim results (Res*) that follow each other.)

1) Res1 = BitwiseXOR of first 8 bits of CrvtDmd_raw (Bit0 to Bit7) and last 8 bits of CrvtDmd_raw (Bit8 to Bit15).

(Note: Res1 has the data typ uint8)

2) Res2 = BitwiseXOR of Res1 and Counter

3) Res3 = BitwiseXOR of Res2 and Res2 bitwise shifted to left by 2

4) Res4 = Res3 mod 240 (modulo operation)

5) CRC_signal_raw = BitwiseOR of fist 2 bits of Counter (Bit0 and Bit1) and last 6 bits of Res4 (Bit2 to Bit7)
Following calculations of ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct) and ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) describe the calcuation of correct module input values, which will result in an correct CRC evaluation.

If one of the two signals have different values, the CRC evaluation will fail. A failing CRC evaluation can be tested if one Bit of the two input signals (ACA_s_CrvtCtl_CrvtGrdDmd, ACA_s_CrvtCtl_CrvtDmd) is different to the correct calculated values.
Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd

(The calculation describes the transformation from raw value (BUS value) to physical value)

1) Data typ transformation of CRC_signal_raw from uint8 to single

2) CrvtGrdDmd_correct = (CRC_signal_raw/3125) - 0.04
Calculation of correct ACA_s_CrvtCtl_CrvtDmd

(The calculation describes the transformation from raw value (BUS value) to physical value)

1) Data typ transformation of CrvtDmd_raw from uint16 to single

2) CrvtDmd_correct = (CrvtDmd_raw/160000) - 0.2
Activation of CRC Evaluation

IF [AND(1,2,3)]:

1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone

3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

THEN:

CRC Evaluation is active

ELSE:

CRC Evaluation is NOT active
Activation of CRC Evaluation

IF [AND(1,2,3)]:

1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone

3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

THEN:

CRC Evaluation is active

ELSEIF [AND(1,2,3)]:

1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone

3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

THEN:

CRC Evaluation is active

ELSE:

CRC Evaluation is NOT active
Activation of CRC Evaluation

IF [AND(1,2,3,4,5)]:

1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone

3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

4) ACA_s_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn

5) VSOCH_s_FlgACAHF_Ena is true

THEN:

CRC Evaluation is active

ELSEIF [AND(1,2,3,4,5)]:

1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone

3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

4) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle

5) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle

THEN:

CRC Evaluation is active

ELSE:

CRC Evaluation is NOT active
TimeOut Detection

(considering Definition of Counter)

IF:

Counter (Bit0 and Bit1 of CRC_signal_raw) do NOT change for 7 time steps

THEN:

TimeOut detected

ELSE:

TimeOut NOT detected

Note: According to Calculation of CRC_signal_raw (CRC 8Bit signal) Bit0 and Bit1 of CRC_signal_raw represent Counter.
CRC Evaluation

(considering Activation of CRC Evaluation)

(considering TimeOut Detection)

(considering Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd)

(considering Calculation of correct ACA_s_CrvtCtl_CrvtDmd)

IF:

CRC Evaluation is NOT active

THEN:

CRC correct

ELSEIF [AND(1,2,3,4)]:

1) CRC Evaluation is active

2) ACA_s_CrvtCtl_CrvtDmd = CrvtDmd_correct

3) ACA_s_CrvtCtl_CrvtGrdDmd = CrvtGrdDmd_correct

4) TimeOut NOT detected

THEN:

CRC correct

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) ACA_s_CrvtCtl_CrvtDmd is NOT equal to CrvtDmd_correct

THEN:

CRC NOT correct

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) ACA_s_CrvtCtl_CrvtGrdDmd is NOT equal to CrvtGrdDmd_correct

THEN:

CRC NOT correct

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) TimeOut detected

THEN:

CRC NOT correct

ELSEIF:

ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff

THEN:

CRC correct

Note: If CRC NOT correct is set once, it will remain in this state until HandsOff is not requested any more (ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)
There is a separate CRC monitoring for ACA Handsfree, which shall be tested by using pre defined simulation files for the signals ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc.

Short description of the simulated scenarios:

* CFBACA_001_SWE3_Input.mat (Revision 1.3): Correct CRC signal, no errors.

* CFBACA_002_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_CrvtDmd at 0,2 seconds.

* CFBACA_003_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_ValCrc at 0,3 seconds.

* CFBACA_004_SWE3_Input.mat (Revision 1.2): Counter Freeze at 0,15 seconds. Fail reaction expected at 0,21 seconds

* CFBACA_005_SWE3_Input.mat (Revision 1.1): Error on ACA_HndFre_StHndDet1 at 0,35 seconds.

The simulation files can be found under following path:

Project /SWC_VMMP/01_PROD/40_T/T_VMMP_SINFCT_CFBACA/40_T/30_DYN/10_TI/02_SF
CRC Evaluation

IF:

CRC Evaluation is NOT active

THEN:

CRC correct

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_001_SWE3_Input.mat

THEN:

CRC correct

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_002_SWE3_Input.mat

THEN:

CRC NOT correct

(Note: CRC NOT correct shall occur 0,2 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_003_SWE3_Input.mat

THEN:

CRC NOT correct

(Note: CRC NOT correct shall occur 0,3 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_004_SWE3_Input.mat

THEN:

CRC NOT correct

(Note: CRC NOT correct shall occur 0,21 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_005_SWE3_Input.mat

THEN:

CRC NOT correct

(Note: CRC NOT correct shall occur 0,35 seconds after mat simulation has started for one time step. Nevertheless Steering-Substitute-Reaction will last for 2,5 seconds)

ELSEIF [AND(1,2)]:

1) CRC Evaluation is active

2) random input values for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken

THEN:

CRC NOT correct

(Note: This ELSEIF shall explicitly mention, that random inputs will lead to "CRC NOT correct")

ELSE:

CRC NOT correct

Note:

Initial State is "CRC correct".
CRC Evaluation and Interface validity are used for calculating CustFctOut_HndFre_StDiagEve and executing Steering-Substitute-Reaction.

CustFctOut_HndFre_StDiagEve defines the output behaviour of the module (Valid Case, Disable Case, NotVld Case, Fail Case, Init Case and Susp Case).
Check Interface validity while HandsOff

The initial state of Interface validity is Interface while HandsOff is valid. (If no IF/ELSEIF is true, the initial condition shall be used)

IF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni

THEN:

Interface while HandsOff is NOT valid

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi

THEN:

Interface while HandsOff is NOT valid

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni

THEN:

Interface while HandsOff is NOT valid

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi

THEN:

Interface while HandsOff is NOT valid

ELSEIF:

Interface while HandsOff is NOT valid has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps

THEN:

Interface while HandsOff is valid

Note: Once set, Interface while HandsOff is NOT valid is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Interface while HandsOff is NOT valid is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).
Calculation of output signal CustFctOut_HndFre_StDiagEve

(considering: CRC Evaluation and Check Interface validity while HandsOff)

IF:

CRC NOT correct

THEN:

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

ELSEIF:

Interface while HandsOff is NOT valid

THEN:

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

ELSE:

CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld
Execute Steering-Substitute-Reaction 

IF:

Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps

THEN:

Steering-Substitute-Reaction is NOT executed

Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true.

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2)]:

1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail

THEN:

Steering-Substitute-Reaction is executed

ELSE:

Steering-Substitute-Reaction does not change

Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).

Note:

Initial State is "Steering-Substitute-Reaction is NOT executed".

The state change is defined by the IF-Statements.
Execute Steering-Substitute-Reaction 

IF:

Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps

THEN:

Steering-Substitute-Reaction is NOT executed

Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true.

ELSEIF [AND(1,2,3,4)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn

3) VSOCH_s_FlgACAHF_Ena is true

4) CRC NOT correct

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn

3) VSOCH_s_FlgACAHF_Ena is true

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn

3) VSOCH_s_FlgACAHF_Ena is true

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn

3) VSOCH_s_FlgACAHF_Ena is true

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn

3) VSOCH_s_FlgACAHF_Ena is true

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle

3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle

4) CRC NOT correct

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle

3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle

3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle

3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi

THEN:

Steering-Substitute-Reaction is executed

ELSEIF [AND(1,2,3,4)]:

1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle

2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle

3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle

4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld

THEN:

Steering-Substitute-Reaction is executed

ELSE:

Steering-Substitute-Reaction does not change

Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).

Note:

Initial State is "Steering-Substitute-Reaction is NOT executed".

The state change is defined by the IF-Statements.
Calculation of output signal CustFctOut_HndFre_StDiagEve

(considering: CRC Evaluation and Check Interface validity while HandsOff)

IF:

CRC NOT correct

THEN:

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

ELSEIF:

Steering-Substitute-Reaction is executed

THEN:

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

ELSE:

CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld
The following functional requirement describes the valid case of the HndFre Service Bridge.
Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv)

CustFctOut_HndFre_StHndDet1 = CustFctIn_HndFre_StHndDet1

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp)

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv

CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd 

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd 

CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty 

CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) 

CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd 

CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd 

CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd
Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv)

CustFctOut_HndFre_StHndDet1 is calculated by Calculation of output signal CustFctOut_HndFre_StHndDet1

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd 

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd 

CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty 

CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) 

CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv, CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.

* All other Outputs will be frozen to the last valid value.
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.

* CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.

* All other Outputs will be frozen to the last valid value.
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_HndFre_StHndDet1 are CustFctOut_HndFreLatCtl_StAcv are set to a defined value or frozen to the last valid value.

* CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.

* All other Outputs will be frozen to the last valid value.
Disable Case:

IF: 

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Disable Case:

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi

2) Steering-Substitute-Reaction is NOT executed 

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Disable Case:

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi

2) Steering-Substitute-Reaction is NOT executed 

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
NotVld Case:

IF [AND(1,2)]:

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
NotVld Case:

IF [AND(1,2)]:

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
NotVld Case:

IF [AND(1,2)]:

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Fail Case:

IF [AND(1,2)]:

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Fail Case:

IF [AND(1,2)]:

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Fail Case:

IF [AND(1,2)]:

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Init

 Case:

IF: 

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Init

 Case:

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Init

 Case:

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Susp Case:

IF: 

CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Susp Case:

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Susp Case:

IF [AND(1,2)]: 

1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp

2) Steering-Substitute-Reaction is NOT executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Steering-Substitute-Reaction Case:

IF:

Steering-Substitute-Reaction is executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Steering-Substitute-Reaction Case:

IF:

Steering-Substitute-Reaction is executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Steering-Substitute-Reaction Case:

IF:

Steering-Substitute-Reaction is executed

THEN: 

CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0

All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)
Depending on whether ACA HF is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), the generic output signals of "LatCtl Service Bridge" or "HndFre Service Bridge" are mapped on the specific output signals.

Outputs of "ACA HndFre Service" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true).

Outputs of "ACA LatCtl Service" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false).
Fault Tolerant Time Interval (FTTI) 

Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).

If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).
Assign generic output signals to specific output signals

Outputs

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN: 

StAcv

CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv

CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp

CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1

All other Outputs

CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd

CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd

CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty

CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq

CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd

States

CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve

CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve

ELSE: 

StAcv

CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv

CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp

CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti

All other Outputs

CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd

CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd

CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty

CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq

CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd

States

CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve

CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone
Assign generic output signals to specific output signals 

Outputs 

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN:

StAcv

CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv

CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp

CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1

All other Outputs

CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd

CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd

CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty

CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq

CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd

States

CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve

CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve

ELSE: 

StAcv

CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv

CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp

CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti

All other Outputs

CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd

CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd

CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty

CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq

CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd

States

CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve

CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone
Assign generic output signals to specific output signals 

Outputs 

(all outputs except CFBACA_s_ACACrvtCtl_FlgGrdExtp)

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN:

StAcv

CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv

CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1

All other Outputs

CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd

CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd

CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty

CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq

CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd

States

CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve

CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve 

 ELSE: 

StAcv

CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv

CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti

All other Outputs

CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd

CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd

CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty

CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq

CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd

States

CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve

CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone

Output CFBACA_s_ACACrvtCtl_FlgGrdExtp:

IF:

VMMP_CFBACA_p_ACALatCtl_SwSti = true

THEN:

CFBACA_s_ACACrvtCtl_FlgGrdExtp = VMMP_CFBACA_p_ACALatCtl_FlgGrdExtpSti

ELSEIF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN:

CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp

ELSE:

CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp
Trigger WarnBrake in case of communication error:

IF [AND(1,2,3,4)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection)

4) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

THEN: 

CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq

ELSEIF [AND(1,2,3,4)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection)

4) ACA_s_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff 

THEN: 

CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq

ELSE: 

CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft

Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step.
Trigger WarnBrake in case of communication error:

IF [AND(1,2,3,4)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection)

4) CFBACA_s_ACAHndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff

THEN: 

CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq

ELSEIF [AND(1,2,3,4)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection)

4) CFBACA_s_ACAHndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

THEN: 

CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq

ELSE: 

CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft

Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step.
Depending on whether ACA HF is coded and enabled, the output signal CFBACA_s_ACALatCtl_StVld is defined by CustFctOut_LatCtl_StDiagEve or CustFctOut_HndFre_StDiagEve_for_StVld.
Assignment for Mapping (ACA LatCtl and ACA HndFre):

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN: 

*StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld

ELSE: 

*StDiagEve = CustFctOut_LatCtl_StDiagEve
Mapping *StDiagEve to *StVld

IF: 

*StDiagEve = VMMP_c_DiagEveSigNotVld

THEN:

*StVld = 3

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigFail

THEN:

*StVld = 3

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigDi

THEN:

*StVld = 2

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigIni

THEN:

*StVld = 2

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigSusp

THEN:

*StVld = 0

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigNone

THEN:

*StVld = 1
Determine CFBACA_s_ACALatCtl_StVld:

CFBACA_s_ACALatCtl_StVld = *StVld

(considering: Assignment for Mapping (ACA LatCtl and ACA HndFre): and Mapping *StDiagEve to *StVld)
ACA WarnBrk Service
Replace generic input signals by specific input signal values, signal classifiers and parameters

Inputs

Signal-Values:

CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq 

Signal-Classifier:

CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq

Parameters 

CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet

CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv

CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff
Replace generic input signals by specific input signal values, signal classifiers and parameters 

Inputs

Signal-Values:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACAWarnBrk_SwSti = true

THEN:

CustFctIn_WarnBrk_ItReq = VMMP_CFBACA_p_ACAWarnBrk_ItReqSti 

ELSE:

CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq

Signal-Classifier:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACAWarnBrk_SwSti = true

THEN:

CustFctIn_WarnBrk_ItReq_sc = 0

ELSE:

CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq

Parameters 

CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet

CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv

CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff
RangeCheck: Check if input signal range is valid

There is no RangeCheck for ACA WarnBrk-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)
Fault Tolerant Time Interval (FTTI) 

Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).

If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).
Assign generic output signals to specific output signals

Outputs

Request

CFBACA_s_ACAWarnBrk_ItReq = CustFctOut_WarnBrk_ItReq

States

CFBACA_s_DiagACAWarnBrk_StEve = CustFctOut_WarnBrk_StDiagEve
ACA StgWhlVib Service
Replace generic input signals by specific input signal values, signal classifiers and parameters

Inputs

Signal-Values:

CustFctIn_StgWhlVib_IdxProfReq = ACA_s_StgWhlVib_IdxProfReq 

Signal-Classifier:

CustFctIn_StgWhlVib_IdxProfReq_sc = ACA_sc_StgWhlVib_IdxProfReq

Parameters 

CustFctIn_StgWhlVib _FlgIniExcDet = VMMP_CFBACA_c_ACAStgWhlVib_FlgIniExcDet

CustFctIn_StgWhlVib _FlgErrQlfAcv = VMMP_CFBACA_c_ACAStgWhlVib_FlgErrQlfAcv

CustFctIn_StgWhlVib _TurnOff = VMMP_CFBACA_p_ACAStgWhlVib_TurnOff
RangeCheck: Check if input signal range is valid

There is no RangeCheck for ACA StgWhlVib-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)
Fault Tolerant Time Interval (FTTI) 

Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).

If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).
Assign generic output signals to specific output signals

Outputs

IF: 

VMMP_CFBACA_p_ACAStgWhlVib_SwSti= true

THEN: 

CFBACA_s_ACAStgWhlVib_IdxProfReq = VMMP_CFBACA_p_ACAStgWhlVib_IdxProfReqSti

ELSE:

CFBACA_s_ACAStgWhlVib_IdxProfReq = CustFctOut_StgWhlVib_IdxProfReq

Note: The assignment of the following signals is independent of the IF statement above.

States

CFBACA_s_DiagACAStgWhlVib_StEve = CustFctOut_StgWhlVib_StDiagEve
The output signals CFBACA_s_ACALgtCtl_StVld and CFBACA_s_ACALatCtl_StVld must always have the values 0, 1, 2 or 3.

To test this requirement no separate test is necessary. Every implemented test case should check the signal range of *StVld in the end.

Row	ID	Type	Status	Relevant	Candidate	Reason	Normalized text
202	42218397	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv IF: CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv IF: CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv THEN: CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq ELSEIF [AND(1,2)]: 1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv 2) Bit1 of BitwiseOR ( CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) is set THEN: CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq ELSE: CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv Raw { "ID": "42218397", "ASIL": " ASIL B", "Text": "Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]: \n_x000D_1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_2) Bit1 of BitwiseOR (\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc\n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) \n_x000D_is set \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]: \n_x000D_1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_2) Bit1 of BitwiseOR (\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc\n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) \n_x000D_is set \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
203	16660725	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq IF: CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtl Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq IF: CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi THEN: CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq ELSE: CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq Raw { "ID": "16660725", "ASIL": " ASIL B", "Text": "Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq \n_x000D_ \n_x000D_IF: \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ELSE:\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361463", "Description": "Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq \n_x000D_ \n_x000D_IF: \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ELSE:\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
204	16660726	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp IF: CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp of the previo Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp IF: CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle THEN: CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 1 (true) ELSE: CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) Raw { "ID": "16660726", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle\n_x000D_THEN:\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 1 (true)\n_x000D_ELSE:\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361464", "Description": "Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle\n_x000D_THEN:\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 1 (true)\n_x000D_ELSE:\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
205	16660727	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv IF: Bit1 of BitwiseOR ( CustFctIn_HndFreLatCtlSlipAgCtl_A Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv IF: Bit1 of BitwiseOR ( CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc) is set THEN: CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) ELSE: CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 1 (true) Raw { "ID": "16660727", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_Bit1 of BitwiseOR (\n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc)\n_x000D_is set\n_x000D_THEN:\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_ELSE:\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 1 (true)", "Type": "Pre Condition", "Status": "Released", "Summary": "Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv", "Relevant": "no", "column_12": "", "Foreign ID": "1361465", "Description": "Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_Bit1 of BitwiseOR (\n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc)\n_x000D_is set\n_x000D_THEN:\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_ELSE:\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 1 (true)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
206	16660728	Pre Condition	Released	no	False	type_not_target, relevance_filtered	HndFre Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_HndFreLatC HndFre Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_HndFreLatCtl_TurnOff FlgIniExcDet equal to CustFctIn_HndFreLatCtl_FlgIniExcDet FlgErrQlfAcv equal to CustFctIn_HndFreLatCtl_FlgErrQlfAcv merged classifier RangeCheck Output: CustFctOut_HndFre_StDiagEve_for_StVld equal to StDiagEve Raw { "ID": "16660728", "ASIL": " ASIL B", "Text": "HndFre Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_HndFreLatCtl_TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_HndFre_StDiagEve_for_StVld equal to StDiagEve", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361466", "Description": "HndFre Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_HndFreLatCtl_TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_HndFre_StDiagEve_for_StVld equal to *StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
207	16660729	Folder		no	False	type_not_target, status_filtered, relevance_filtered	HndFre Specific Pre Conditions HndFre Specific Pre Conditions Raw { "ID": "16660729", "ASIL": " ", "Text": "HndFre Specific Pre Conditions", "Type": "Folder", "Status": "", "Summary": "HndFre Specific Pre Conditions", "Relevant": "no", "column_12": "", "Foreign ID": "1361504", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
208	16660730	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following pre conditions are part of the "HandFre Service Bridge" and describe the calculation of CustFctOut_HndFre_StDiagEve The following pre conditions are part of the "HandFre Service Bridge" and describe the calculation of CustFctOut_HndFre_StDiagEve (based on CustFctOut_HndFre_StDiagEve_for_StVld and Signalmonitoring) and the Steering-Substitute-Reaction. The Steering-Substitute-Reaction ensures that CustFctIn_HndFre_StHndDet1 and CustFctOut_LatCtl_StAcv as well as all other outputs of the "HndFre Service Bridge" are frozen to the last valid value for 2.5 seconds. Raw { "ID": "16660730", "ASIL": " ", "Text": "The following pre conditions are part of the \"HandFre Service Bridge\" and describe the calculation of CustFctOut_HndFre_StDiagEve (based on CustFctOut_HndFre_StDiagEve_for_StVld and Signalmonitoring)\n_x000D_and the Steering-Substitute-Reaction.\n_x000D_ \n_x000D_The Steering-Substitute-Reaction ensures that CustFctIn_HndFre_StHndDet1 and CustFctOut_LatCtl_StAcv as well as all other outputs of the \"HndFre Service Bridge\" are frozen to the last valid value for 2.5 seconds.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361498", "Description": "The following pre conditions are part of the \"HandFre Service Bridge\" and describe the calculation of CustFctOut_HndFre_StDiagEve (based on CustFctOut_HndFre_StDiagEve_for_StVld and Signalmonitoring)\n_x000D_and the Steering-Substitute-Reaction.\n_x000D_ \n_x000D_The Steering-Substitute-Reaction ensures that CustFctIn_HndFre_StHndDet1 and CustFctOut_LatCtl_StAcv as well as all other outputs of the \"HndFre Service Bridge\" are frozen to the last valid value for 2.5 seconds.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
209	16660731	Folder		no	False	type_not_target, status_filtered, relevance_filtered	CRC Evaluation CRC Evaluation Raw { "ID": "16660731", "ASIL": " ", "Text": "CRC Evaluation", "Type": "Folder", "Status": "", "Summary": "CRC Evaluation", "Relevant": "no", "column_12": "", "Foreign ID": "1378019", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
210	16660732	Information		no	False	type_not_target, status_filtered, relevance_filtered	CRC Evaluation uses the following modul inputs: * ACA_s_CrvtCtl_CrvtDmd (data typ single) * ACA_s_CrvtCtl_CrvtGrdDmd (data typ s CRC Evaluation uses the following modul inputs: * ACA_s_CrvtCtl_CrvtDmd (data typ single) * ACA_s_CrvtCtl_CrvtGrdDmd (data typ single) * ACA_s_HndFre_StHndDet1 (data typ uint8) For testing the CRC Evaluation in CFBACA, the input signals ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd have to be calculate in the same way as ACA Customer Function will calculate the signals on HCP2. ACA_s_CrvtCtl_CrvtGrdDmd depends on ACA_s_CrvtCtl_CrvtDmd! Therefore CrvtDmd_raw and ACA_s_HndFre_StHndDet1 define how ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd shall be calculated. The following Pre Conditions describe how ACA Customer Function will calculate correct values of ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) and ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct). If CrvtDmd_correct and CrvtGrdDmd_correct are applied as module inputs for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd, the CRC Evaluation will not detected CRC failures. If any other combination of ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd are applied, the CRC Evaluation will detected CRC failures. Raw { "ID": "16660732", "ASIL": " ", "Text": "CRC Evaluation uses the following modul inputs:\n_x000D_* ACA_s_CrvtCtl_CrvtDmd (data typ single)\n_x000D_* ACA_s_CrvtCtl_CrvtGrdDmd (data typ single)\n_x000D_* ACA_s_HndFre_StHndDet1 (data typ uint8)\n_x000D_ \n_x000D_\n_x000D_\n_x000D_For testing the CRC Evaluation in CFBACA, the input signals ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd have to be calculate in the same way as ACA Customer Function will calculate the signals on HCP2. ACA_s_CrvtCtl_CrvtGrdDmd depends on ACA_s_CrvtCtl_CrvtDmd!\n_x000D_\n_x000D_Therefore CrvtDmd_raw and ACA_s_HndFre_StHndDet1 define how ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd shall be calculated.\n_x000D_\n_x000D_The following Pre Conditions describe how ACA Customer Function will calculate correct values of ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) and ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct).\n_x000D_\n_x000D_If CrvtDmd_correct and CrvtGrdDmd_correct are applied as module inputs for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd, the CRC Evaluation will not detected CRC failures. If any other combination of ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd are applied, the CRC Evaluation will detected CRC failures.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1377879", "Description": "CRC Evaluation uses the following modul inputs:\n_x000D_* ACA_s_CrvtCtl_CrvtDmd (data typ single)\n_x000D_* ACA_s_CrvtCtl_CrvtGrdDmd (data typ single)\n_x000D_* ACA_s_HndFre_StHndDet1 (data typ uint8)\n_x000D_ \n_x000D_\n_x000D_\n_x000D_For testing the CRC Evaluation in CFBACA, the input signals ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd have to be calculate in the same way as ACA Customer Function will calculate the signals on HCP2. ACA_s_CrvtCtl_CrvtGrdDmd depends on ACA_s_CrvtCtl_CrvtDmd!\n_x000D_\n_x000D_Therefore CrvtDmd_raw and ACA_s_HndFre_StHndDet1 define how ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd shall be calculated.\n_x000D_\n_x000D_The following Pre Conditions describe how ACA Customer Function will calculate correct values of ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) and ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct).\n_x000D_\n_x000D_If CrvtDmd_correct and CrvtGrdDmd_correct are applied as module inputs for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd, the CRC Evaluation will not detected CRC failures. If any other combination of ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_CrvtGrdDmd are applied, the CRC Evaluation will detected CRC failures.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
211	16660733	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following Pre Conditions describe how CRC_signal_raw is calculated by CrvtDmd_raw and Counter. The following Pre Conditions describe how CRC_signal_raw is calculated by CrvtDmd_raw and Counter. Raw { "ID": "16660733", "ASIL": " ", "Text": "The following Pre Conditions describe how CRC_signal_raw is calculated by CrvtDmd_raw and Counter.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387806", "Description": "The following Pre Conditions describe how CRC_signal_raw is calculated by CrvtDmd_raw and Counter.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
212	16660734	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	Definition of CrvtDmd_raw CrvtDmd_raw is an uint16 signal with a limited signal range of 0 to 64000. Definition of CrvtDmd_raw CrvtDmd_raw is an uint16 signal with a limited signal range of 0 to 64000. Raw { "ID": "16660734", "ASIL": " ASIL B", "Text": "Definition of CrvtDmd_raw\n_x000D_ \n_x000D_CrvtDmd_raw is an uint16 signal with a limited signal range of 0 to 64000.", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378036", "Description": "Definition of CrvtDmd_raw\n_x000D_ \n_x000D_CrvtDmd_raw is an uint16 signal with a limited signal range of 0 to 64000.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
213	16660735	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	Definition of Counter Counter is an uint8 signal. Counter starts at 0. Counter starts counting when ACA_s_HndFre_StHndDet1 = VM Definition of Counter Counter is an uint8 signal. Counter starts at 0. Counter starts counting when ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff Counter counts up by 1 at every time step while ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff. Counter will be reset to 0 if ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff. Raw { "ID": "16660735", "ASIL": " ASIL B", "Text": "Definition of Counter\n_x000D_ \n_x000D_Counter is an uint8 signal.\n_x000D_Counter starts at 0.\n_x000D_Counter starts counting when ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_Counter counts up by 1 at every time step while ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff.\n_x000D_Counter will be reset to 0 if ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff.", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378039", "Description": "Definition of Counter\n_x000D_ \n_x000D_Counter is an uint8 signal.\n_x000D_Counter starts at 0.\n_x000D_Counter starts counting when ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_Counter counts up by 1 at every time step while ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff.\n_x000D_Counter will be reset to 0 if ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
214	16660736	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	Calculation of CRC_signal_raw (CRC 8Bit signal) (Note: Calculation is decribed by different calculation steps and interim results Calculation of CRC_signal_raw (CRC 8Bit signal) (Note: Calculation is decribed by different calculation steps and interim results (Res) that follow each other.) 1) Res1 = BitwiseXOR of first 8 bits of CrvtDmd_raw (Bit0 to Bit7) and last 8 bits of CrvtDmd_raw (Bit8 to Bit15). (Note: Res1 has the data typ uint8) 2) Res2 = BitwiseXOR of Res1 and Counter 3) Res3 = BitwiseXOR of Res2 and Res2 bitwise shifted to left by 2 4) Res4 = Res3 mod 240 (modulo operation) 5) CRC_signal_raw = BitwiseOR of fist 2 bits of Counter (Bit0 and Bit1) and last 6 bits of Res4 (Bit2 to Bit7) Raw { "ID": "16660736", "ASIL": " ASIL B", "Text": "Calculation of CRC_signal_raw (CRC 8Bit signal)\n_x000D_(Note: Calculation is decribed by different calculation steps and interim results (Res) that follow each other.)\n_x000D_ \n_x000D_1) Res1 = BitwiseXOR of first 8 bits of CrvtDmd_raw (Bit0 to Bit7) and last 8 bits of CrvtDmd_raw (Bit8 to Bit15).\n_x000D_(Note: Res1 has the data typ uint8)\n_x000D_2) Res2 = BitwiseXOR of Res1 and Counter\n_x000D_3) Res3 = BitwiseXOR of Res2 and Res2 bitwise shifted to left by 2\n_x000D_4) Res4 = Res3 mod 240 (modulo operation)\n_x000D_5) CRC_signal_raw = BitwiseOR of fist 2 bits of Counter (Bit0 and Bit1) and last 6 bits of Res4 (Bit2 to Bit7)", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378031", "Description": "Calculation of CRC_signal_raw (CRC 8Bit signal)\n_x000D_(Note: Calculation is decribed by different calculation steps and interim results (Res*) that follow each other.)\n_x000D_ \n_x000D_1) Res1 = BitwiseXOR of first 8 bits of CrvtDmd_raw (Bit0 to Bit7) and last 8 bits of CrvtDmd_raw (Bit8 to Bit15).\n_x000D_(Note: Res1 has the data typ uint8)\n_x000D_2) Res2 = BitwiseXOR of Res1 and Counter\n_x000D_3) Res3 = BitwiseXOR of Res2 and Res2 bitwise shifted to left by 2\n_x000D_4) Res4 = Res3 mod 240 (modulo operation)\n_x000D_5) CRC_signal_raw = BitwiseOR of fist 2 bits of Counter (Bit0 and Bit1) and last 6 bits of Res4 (Bit2 to Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
215	16660737	Information		no	False	type_not_target, status_filtered, relevance_filtered	Following calculations of ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct) and ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) describe the c Following calculations of ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct) and ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) describe the calcuation of correct module input values, which will result in an correct CRC evaluation. If one of the two signals have different values, the CRC evaluation will fail. A failing CRC evaluation can be tested if one Bit of the two input signals (ACA_s_CrvtCtl_CrvtGrdDmd, ACA_s_CrvtCtl_CrvtDmd) is different to the correct calculated values. Raw { "ID": "16660737", "ASIL": " ", "Text": "Following calculations of ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct) and ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) describe the calcuation of correct module input values, which will result in an correct CRC evaluation.\n_x000D_ \n_x000D_\n_x000D_\n_x000D_If one of the two signals have different values, the CRC evaluation will fail. A failing CRC evaluation can be tested if one Bit of the two input signals (ACA_s_CrvtCtl_CrvtGrdDmd, ACA_s_CrvtCtl_CrvtDmd) is different to the correct calculated values.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378295", "Description": "Following calculations of ACA_s_CrvtCtl_CrvtGrdDmd (CrvtGrdDmd_correct) and ACA_s_CrvtCtl_CrvtDmd (CrvtDmd_correct) describe the calcuation of correct module input values, which will result in an correct CRC evaluation.\n_x000D_ \n_x000D_\n_x000D_\n_x000D_If one of the two signals have different values, the CRC evaluation will fail. A failing CRC evaluation can be tested if one Bit of the two input signals (ACA_s_CrvtCtl_CrvtGrdDmd, ACA_s_CrvtCtl_CrvtDmd) is different to the correct calculated values.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
216	16660738	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd (The calculation describes the transformation from raw value (BUS value) to physi Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd (The calculation describes the transformation from raw value (BUS value) to physical value) 1) Data typ transformation of CRC_signal_raw from uint8 to single 2) CrvtGrdDmd_correct = (CRC_signal_raw/3125) - 0.04 Raw { "ID": "16660738", "ASIL": " ASIL B", "Text": "Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd\n_x000D_(The calculation describes the transformation from raw value (BUS value) to physical value)\n_x000D_ \n_x000D_1) Data typ transformation of CRC_signal_raw from uint8 to single\n_x000D_2) CrvtGrdDmd_correct = (CRC_signal_raw/3125) - 0.04", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378042", "Description": "Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd\n_x000D_(The calculation describes the transformation from raw value (BUS value) to physical value)\n_x000D_ \n_x000D_1) Data typ transformation of CRC_signal_raw from uint8 to single\n_x000D_2) CrvtGrdDmd_correct = (CRC_signal_raw/3125) - 0.04", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
217	16660739	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	Calculation of correct ACA_s_CrvtCtl_CrvtDmd (The calculation describes the transformation from raw value (BUS value) to physical Calculation of correct ACA_s_CrvtCtl_CrvtDmd (The calculation describes the transformation from raw value (BUS value) to physical value) 1) Data typ transformation of CrvtDmd_raw from uint16 to single 2) CrvtDmd_correct = (CrvtDmd_raw/160000) - 0.2 Raw { "ID": "16660739", "ASIL": " ASIL B", "Text": "Calculation of correct ACA_s_CrvtCtl_CrvtDmd\n_x000D_(The calculation describes the transformation from raw value (BUS value) to physical value)\n_x000D_ \n_x000D_1) Data typ transformation of CrvtDmd_raw from uint16 to single\n_x000D_2) CrvtDmd_correct = (CrvtDmd_raw/160000) - 0.2", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378033", "Description": "Calculation of correct ACA_s_CrvtCtl_CrvtDmd\n_x000D_(The calculation describes the transformation from raw value (BUS value) to physical value)\n_x000D_ \n_x000D_1) Data typ transformation of CrvtDmd_raw from uint16 to single\n_x000D_2) CrvtDmd_correct = (CrvtDmd_raw/160000) - 0.2", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
218	16660740	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Activation of CRC Evaluation IF [AND(1,2,3)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_ Activation of CRC Evaluation IF [AND(1,2,3)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone 3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CRC Evaluation is active ELSE: CRC Evaluation is NOT active Raw { "ID": "16660740", "ASIL": " ASIL B", "Text": "Activation of CRC Evaluation\n_x000D_ \n_x000D_IF [AND(1,2,3)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_CRC Evaluation is NOT active", "Type": "Pre Condition", "Status": "Released", "Summary": "Activation of CRC Evaluation", "Relevant": "no", "column_12": "", "Foreign ID": "1378044", "Description": "Activation of CRC Evaluation\n_x000D_ \n_x000D_IF [AND(1,2,3)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_CRC Evaluation is NOT active", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
219	25722925	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Activation of CRC Evaluation IF [AND(1,2,3)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_ Activation of CRC Evaluation IF [AND(1,2,3)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone 3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CRC Evaluation is active ELSEIF [AND(1,2,3)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone 3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle THEN: CRC Evaluation is active ELSE: CRC Evaluation is NOT active Raw { "ID": "25722925", "ASIL": " ASIL B", "Text": "Activation of CRC Evaluation\n_x000D_ \n_x000D_IF [AND(1,2,3)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_CRC Evaluation is NOT active", "Type": "Pre Condition", "Status": "Released", "Summary": "Activation of CRC Evaluation", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Activation of CRC Evaluation\n_x000D_ \n_x000D_IF [AND(1,2,3)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_CRC Evaluation is NOT active", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
220	42220513	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Activation of CRC Evaluation IF [AND(1,2,3,4,5)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiag Activation of CRC Evaluation IF [AND(1,2,3,4,5)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone 3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 4) ACA_s_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn 5) VSOCH_s_FlgACAHF_Ena is true THEN: CRC Evaluation is active ELSEIF [AND(1,2,3,4,5)]: 1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone 3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle 4) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle 5) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle THEN: CRC Evaluation is active ELSE: CRC Evaluation is NOT active Raw { "ID": "42220513", "ASIL": " ASIL B", "Text": "Activation of CRC Evaluation\n_x000D_ \n_x000D_IF [AND(1,2,3,4,5)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_4) ACA_s_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_5) VSOCH_s_FlgACAHF_Ena is true\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4,5)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_4) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_5) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_CRC Evaluation is NOT active", "Type": "Pre Condition", "Status": "Released", "Summary": "Activation of CRC Evaluation", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Activation of CRC Evaluation\n_x000D_ \n_x000D_IF [AND(1,2,3,4,5)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_4) ACA_s_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_5) VSOCH_s_FlgACAHF_Ena is true\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4,5)]:\n_x000D_1) VMMP_CFBACA_p_ACAHndFre_TurnOffCrvtCks = false\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNone\n_x000D_3) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_4) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_5) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_THEN:\n_x000D_CRC Evaluation is active\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_CRC Evaluation is NOT active", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
221	16660741	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	TimeOut Detection (considering Definition of Counter) IF: Counter (Bit0 and Bit1 of CRC_signal_raw) do NOT change for 7 time st TimeOut Detection (considering Definition of Counter) IF: Counter (Bit0 and Bit1 of CRC_signal_raw) do NOT change for 7 time steps THEN: TimeOut detected ELSE: TimeOut NOT detected Note: According to Calculation of CRC_signal_raw (CRC 8Bit signal) Bit0 and Bit1 of CRC_signal_raw represent Counter. Raw { "ID": "16660741", "ASIL": " ASIL B", "Text": "TimeOut Detection\n_x000D_(considering Definition of Counter)\n_x000D_ \n_x000D_IF:\n_x000D_Counter (Bit0 and Bit1 of CRC_signal_raw) do NOT change for 7 time steps\n_x000D_THEN:\n_x000D_TimeOut detected\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_TimeOut NOT detected\n_x000D_ \n_x000D_Note: According to Calculation of CRC_signal_raw (CRC 8Bit signal) Bit0 and Bit1 of CRC_signal_raw represent Counter.", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1378049", "Description": "TimeOut Detection\n_x000D_(considering Definition of Counter)\n_x000D_ \n_x000D_IF:\n_x000D_Counter (Bit0 and Bit1 of CRC_signal_raw) do NOT change for 7 time steps\n_x000D_THEN:\n_x000D_TimeOut detected\n_x000D_ \n_x000D_\n_x000D_ELSE:\n_x000D_TimeOut NOT detected\n_x000D_ \n_x000D_Note: According to Calculation of CRC_signal_raw (CRC 8Bit signal) Bit0 and Bit1 of CRC_signal_raw represent Counter.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
222	16660742	Pre Condition	Obsolete	no	False	type_not_target, status_filtered, relevance_filtered	CRC Evaluation (considering Activation of CRC Evaluation) (considering TimeOut Detection) (considering Calculation of correct A CRC Evaluation (considering Activation of CRC Evaluation) (considering TimeOut Detection) (considering Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd) (considering Calculation of correct ACA_s_CrvtCtl_CrvtDmd) IF: CRC Evaluation is NOT active THEN: CRC correct ELSEIF [AND(1,2,3,4)]: 1) CRC Evaluation is active 2) ACA_s_CrvtCtl_CrvtDmd = CrvtDmd_correct 3) ACA_s_CrvtCtl_CrvtGrdDmd = CrvtGrdDmd_correct 4) TimeOut NOT detected THEN: CRC correct ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) ACA_s_CrvtCtl_CrvtDmd is NOT equal to CrvtDmd_correct THEN: CRC NOT correct ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) ACA_s_CrvtCtl_CrvtGrdDmd is NOT equal to CrvtGrdDmd_correct THEN: CRC NOT correct ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) TimeOut detected THEN: CRC NOT correct ELSEIF: ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CRC correct Note: If CRC NOT correct is set once, it will remain in this state until HandsOff is not requested any more (ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff) Raw { "ID": "16660742", "ASIL": " ASIL B", "Text": "CRC Evaluation\n_x000D_(considering Activation of CRC Evaluation)\n_x000D_(considering TimeOut Detection)\n_x000D_(considering Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd)\n_x000D_(considering Calculation of correct ACA_s_CrvtCtl_CrvtDmd)\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC Evaluation is NOT active\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) ACA_s_CrvtCtl_CrvtDmd = CrvtDmd_correct\n_x000D_3) ACA_s_CrvtCtl_CrvtGrdDmd = CrvtGrdDmd_correct\n_x000D_4) TimeOut NOT detected\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) ACA_s_CrvtCtl_CrvtDmd is NOT equal to CrvtDmd_correct\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) ACA_s_CrvtCtl_CrvtGrdDmd is NOT equal to CrvtGrdDmd_correct\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) TimeOut detected\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_ELSEIF:\n_x000D_ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_\n_x000D_Note: If CRC NOT correct is set once, it will remain in this state until HandsOff is not requested any more (ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)", "Type": "Pre Condition", "Status": "Obsolete", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361496", "Description": "CRC Evaluation\n_x000D_(considering Activation of CRC Evaluation)\n_x000D_(considering TimeOut Detection)\n_x000D_(considering Calculation of correct ACA_s_CrvtCtl_CrvtGrdDmd)\n_x000D_(considering Calculation of correct ACA_s_CrvtCtl_CrvtDmd)\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC Evaluation is NOT active\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) ACA_s_CrvtCtl_CrvtDmd = CrvtDmd_correct\n_x000D_3) ACA_s_CrvtCtl_CrvtGrdDmd = CrvtGrdDmd_correct\n_x000D_4) TimeOut NOT detected\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) ACA_s_CrvtCtl_CrvtDmd is NOT equal to CrvtDmd_correct\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) ACA_s_CrvtCtl_CrvtGrdDmd is NOT equal to CrvtGrdDmd_correct\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) TimeOut detected\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_ELSEIF:\n_x000D_ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_\n_x000D_Note: If CRC NOT correct is set once, it will remain in this state until HandsOff is not requested any more (ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
223	18508321	Information		no	False	type_not_target, status_filtered, relevance_filtered	There is a separate CRC monitoring for ACA Handsfree, which shall be tested by using pre defined simulation files for the signals There is a separate CRC monitoring for ACA Handsfree, which shall be tested by using pre defined simulation files for the signals ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc. Short description of the simulated scenarios: * CFBACA_001_SWE3_Input.mat (Revision 1.3): Correct CRC signal, no errors. * CFBACA_002_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_CrvtDmd at 0,2 seconds. * CFBACA_003_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_ValCrc at 0,3 seconds. * CFBACA_004_SWE3_Input.mat (Revision 1.2): Counter Freeze at 0,15 seconds. Fail reaction expected at 0,21 seconds * CFBACA_005_SWE3_Input.mat (Revision 1.1): Error on ACA_HndFre_StHndDet1 at 0,35 seconds. The simulation files can be found under following path: Project /SWC_VMMP/01_PROD/40_T/T_VMMP_SINFCT_CFBACA/40_T/30_DYN/10_TI/02_SF Raw { "ID": "18508321", "ASIL": " ", "Text": "There is a separate CRC monitoring for ACA Handsfree, which shall be tested by using pre defined simulation files for the signals ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc.\n_x000D_Short description of the simulated scenarios:\n_x000D_* CFBACA_001_SWE3_Input.mat (Revision 1.3): Correct CRC signal, no errors.\n_x000D_* CFBACA_002_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_CrvtDmd at 0,2 seconds.\n_x000D_* CFBACA_003_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_ValCrc at 0,3 seconds.\n_x000D_* CFBACA_004_SWE3_Input.mat (Revision 1.2): Counter Freeze at 0,15 seconds. Fail reaction expected at 0,21 seconds\n_x000D_* CFBACA_005_SWE3_Input.mat (Revision 1.1): Error on ACA_HndFre_StHndDet1 at 0,35 seconds.\n_x000D_The simulation files can be found under following path:\n_x000D_Project /SWC_VMMP/01_PROD/40_T/T_VMMP_SINFCT_CFBACA/40_T/30_DYN/10_TI/02_SF", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "There is a separate CRC monitoring for ACA Handsfree, which shall be tested by using pre defined simulation files for the signals ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc.\n_x000D_Short description of the simulated scenarios:\n_x000D_* CFBACA_001_SWE3_Input.mat (Revision 1.3): Correct CRC signal, no errors.\n_x000D_* CFBACA_002_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_CrvtDmd at 0,2 seconds.\n_x000D_* CFBACA_003_SWE3_Input.mat (Revision 1.2): Bit error in ACA_s_CrvtCtl_ValCrc at 0,3 seconds.\n_x000D_* CFBACA_004_SWE3_Input.mat (Revision 1.2): Counter Freeze at 0,15 seconds. Fail reaction expected at 0,21 seconds\n_x000D_* CFBACA_005_SWE3_Input.mat (Revision 1.1): Error on ACA_HndFre_StHndDet1 at 0,35 seconds.\n_x000D_The simulation files can be found under following path:\n_x000D_Project /SWC_VMMP/01_PROD/40_T/T_VMMP_SINFCT_CFBACA/40_T/30_DYN/10_TI/02_SF", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
224	18466258	Pre Condition	Released	no	False	type_not_target, relevance_filtered	CRC Evaluation IF: CRC Evaluation is NOT active THEN: CRC correct ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) inputs CRC Evaluation IF: CRC Evaluation is NOT active THEN: CRC correct ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_001_SWE3_Input.mat THEN: CRC correct ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_002_SWE3_Input.mat THEN: CRC NOT correct (Note: CRC NOT correct shall occur 0,2 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff) ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_003_SWE3_Input.mat THEN: CRC NOT correct (Note: CRC NOT correct shall occur 0,3 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff) ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_004_SWE3_Input.mat THEN: CRC NOT correct (Note: CRC NOT correct shall occur 0,21 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff) ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_005_SWE3_Input.mat THEN: CRC NOT correct (Note: CRC NOT correct shall occur 0,35 seconds after mat simulation has started for one time step. Nevertheless Steering-Substitute-Reaction will last for 2,5 seconds) ELSEIF [AND(1,2)]: 1) CRC Evaluation is active 2) random input values for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken THEN: CRC NOT correct (Note: This ELSEIF shall explicitly mention, that random inputs will lead to "CRC NOT correct") ELSE: CRC NOT correct Note: Initial State is "CRC correct". Raw { "ID": "18466258", "ASIL": " ASIL B", "Text": "CRC Evaluation\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC Evaluation is NOT active\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_001_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_002_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,2 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_003_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,3 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_004_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,21 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_005_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,35 seconds after mat simulation has started for one time step. Nevertheless Steering-Substitute-Reaction will last for 2,5 seconds)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) random input values for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: This ELSEIF shall explicitly mention, that random inputs will lead to \"CRC NOT correct\")\n_x000D_ \n_x000D_ELSE:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_Note:\n_x000D_Initial State is \"CRC correct\".", "Type": "Pre Condition", "Status": "Released", "Summary": "CRC Evaluation", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "CRC Evaluation\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC Evaluation is NOT active\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_001_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC correct\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_002_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,2 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_003_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,3 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_004_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,21 seconds after mat simulation has started and remains until ACA_s_HndFre_StHndDet1 is NOT equal to VMMP_SINFCT_c_CusFctIn_HandsOff)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) inputs for ACA_s_HndFre_StHndDet1, ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken from simulation file CFBACA_005_SWE3_Input.mat\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: CRC NOT correct shall occur 0,35 seconds after mat simulation has started for one time step. Nevertheless Steering-Substitute-Reaction will last for 2,5 seconds)\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CRC Evaluation is active\n_x000D_2) random input values for ACA_s_CrvtCtl_CrvtDmd and ACA_s_CrvtCtl_ValCrc are taken\n_x000D_THEN:\n_x000D_CRC NOT correct\n_x000D_(Note: This ELSEIF shall explicitly mention, that random inputs will lead to \"CRC NOT correct\")\n_x000D_ \n_x000D_ELSE:\n_x000D_CRC NOT correct\n_x000D_ \n_x000D_Note:\n_x000D_Initial State is \"CRC correct\".", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
225	16660743	Information		no	False	type_not_target, status_filtered, relevance_filtered	CRC Evaluation and Interface validity are used for calculating CustFctOut_HndFre_StDiagEve and executing Steering-Substitute-React CRC Evaluation and Interface validity are used for calculating CustFctOut_HndFre_StDiagEve and executing Steering-Substitute-Reaction. CustFctOut_HndFre_StDiagEve defines the output behaviour of the module (Valid Case, Disable Case, NotVld Case, Fail Case, Init Case and Susp Case). Raw { "ID": "16660743", "ASIL": " ", "Text": "CRC Evaluation and Interface validity are used for calculating CustFctOut_HndFre_StDiagEve and executing Steering-Substitute-Reaction.\n_x000D_CustFctOut_HndFre_StDiagEve defines the output behaviour of the module (Valid Case, Disable Case, NotVld Case, Fail Case, Init Case and Susp Case).", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387808", "Description": "CRC Evaluation and Interface validity are used for calculating CustFctOut_HndFre_StDiagEve and executing Steering-Substitute-Reaction.\n_x000D_CustFctOut_HndFre_StDiagEve defines the output behaviour of the module (Valid Case, Disable Case, NotVld Case, Fail Case, Init Case and Susp Case).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
226	16660744	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Check Interface validity while HandsOff The initial state of Interface validity is Interface while HandsOff is valid. (If no IF/E Check Interface validity while HandsOff The initial state of Interface validity is Interface while HandsOff is valid. (If no IF/ELSEIF is true, the initial condition shall be used) IF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni THEN: Interface while HandsOff is NOT valid ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi THEN: Interface while HandsOff is NOT valid ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni THEN: Interface while HandsOff is NOT valid ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi THEN: Interface while HandsOff is NOT valid ELSEIF: Interface while HandsOff is NOT valid has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps THEN: Interface while HandsOff is valid Note: Once set, Interface while HandsOff is NOT valid is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Interface while HandsOff is NOT valid is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Raw { "ID": "16660744", "ASIL": " ASIL B", "Text": "Check Interface validity while HandsOff\n_x000D_The initial state of Interface validity is Interface while HandsOff is valid. (If no IF/ELSEIF is true, the initial condition shall be used)\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_\n_x000D_ELSEIF:\n_x000D_Interface while HandsOff is NOT valid has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps\n_x000D_THEN:\n_x000D_Interface while HandsOff is valid\n_x000D_ \n_x000D_Note: Once set, Interface while HandsOff is NOT valid is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Interface while HandsOff is NOT valid is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).", "Type": "Pre Condition", "Status": "Released", "Summary": "Check Interface validity while HandsOff", "Relevant": "no", "column_12": "", "Foreign ID": "1361500", "Description": "Check Interface validity while HandsOff\n_x000D_The initial state of Interface validity is Interface while HandsOff is valid. (If no IF/ELSEIF is true, the initial condition shall be used)\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_ \n_x000D_\n_x000D_ELSEIF:\n_x000D_Interface while HandsOff is NOT valid has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps\n_x000D_THEN:\n_x000D_Interface while HandsOff is valid\n_x000D_ \n_x000D_Note: Once set, Interface while HandsOff is NOT valid is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Interface while HandsOff is NOT valid is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
227	16660745	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_HndFre_StDiagEve (considering: CRC Evaluation and Check Interface validity while HandsOff Calculation of output signal CustFctOut_HndFre_StDiagEve (considering: CRC Evaluation and Check Interface validity while HandsOff) IF: CRC NOT correct THEN: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld ELSEIF: Interface while HandsOff is NOT valid THEN: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld ELSE: CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld Raw { "ID": "16660745", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_HndFre_StDiagEve\n_x000D_(considering: CRC Evaluation and Check Interface validity while HandsOff)\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC NOT correct\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSEIF:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSE:\n_x000D_CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld", "Type": "Pre Condition", "Status": "Released", "Summary": "Calculation of output signal CustFctOut_HndFre_StDiagEve", "Relevant": "no", "column_12": "", "Foreign ID": "1361494", "Description": "Calculation of output signal CustFctOut_HndFre_StDiagEve\n_x000D_(considering: CRC Evaluation and Check Interface validity while HandsOff)\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC NOT correct\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSEIF:\n_x000D_Interface while HandsOff is NOT valid\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSE:\n_x000D_CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
228	16660746	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Execute Steering-Substitute-Reaction IF: Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi Execute Steering-Substitute-Reaction IF: Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps THEN: Steering-Substitute-Reaction is NOT executed Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true. ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2)]: 1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail THEN: Steering-Substitute-Reaction is executed ELSE: Steering-Substitute-Reaction does not change Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Note: Initial State is "Steering-Substitute-Reaction is NOT executed". The state change is defined by the IF-Statements. Raw { "ID": "16660746", "ASIL": " ASIL B", "Text": "Execute Steering-Substitute-Reaction \n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true.\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSE:\n_x000D_Steering-Substitute-Reaction does not change\n_x000D_ \n_x000D_Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).\n_x000D_ \n_x000D_Note:\n_x000D_Initial State is \"Steering-Substitute-Reaction is NOT executed\".\n_x000D_The state change is defined by the IF-Statements.", "Type": "Pre Condition", "Status": "Released", "Summary": "Execute Steering-Substitute-Reaction", "Relevant": "no", "column_12": "", "Foreign ID": "1361502", "Description": "Execute Steering-Substitute-Reaction \n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true.\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSE:\n_x000D_Steering-Substitute-Reaction does not change\n_x000D_ \n_x000D_Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).\n_x000D_ \n_x000D_Note:\n_x000D_Initial State is \"Steering-Substitute-Reaction is NOT executed\".\n_x000D_The state change is defined by the IF-Statements.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
229	42241419	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Execute Steering-Substitute-Reaction IF: Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi Execute Steering-Substitute-Reaction IF: Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps THEN: Steering-Substitute-Reaction is NOT executed Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true. ELSEIF [AND(1,2,3,4)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn 3) VSOCH_s_FlgACAHF_Ena is true 4) CRC NOT correct THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn 3) VSOCH_s_FlgACAHF_Ena is true 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn 3) VSOCH_s_FlgACAHF_Ena is true 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn 3) VSOCH_s_FlgACAHF_Ena is true 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn 3) VSOCH_s_FlgACAHF_Ena is true 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle 2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle 3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle 4) CRC NOT correct THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle 2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle 3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle 2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle 3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle 2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle 3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi THEN: Steering-Substitute-Reaction is executed ELSEIF [AND(1,2,3,4)]: 1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle 2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle 3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle 4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld THEN: Steering-Substitute-Reaction is executed ELSE: Steering-Substitute-Reaction does not change Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Note: Initial State is "Steering-Substitute-Reaction is NOT executed". The state change is defined by the IF-Statements. Raw { "ID": "42241419", "ASIL": " ASIL B", "Text": "Execute Steering-Substitute-Reaction \n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true.\n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CRC NOT correct\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CRC NOT correct\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSE:\n_x000D_Steering-Substitute-Reaction does not change\n_x000D_ \n_x000D_Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).\n_x000D_ \n_x000D_Note:\n_x000D_Initial State is \"Steering-Substitute-Reaction is NOT executed\".\n_x000D_The state change is defined by the IF-Statements.", "Type": "Pre Condition", "Status": "Released", "Summary": "Execute Steering-Substitute-Reaction", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Execute Steering-Substitute-Reaction \n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed has been set for VMMP_ARB_p_ACAHndFre_EsclTi time steps\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_Note: The following ELSEIF conditions must be evaluated as EdgeDetection. Meaning, the ELSEIFs are only true for one time step, if both conditions within a ELSEIF are true.\n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CRC NOT correct\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) CustFctIn_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 = VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CRC NOT correct\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) ACA_s_HndFre_StHndDet1 was equal to VMMP_SINFCT_c_CusFctIn_HandsOff in the previous computation cycle\n_x000D_2) ACA_s_HndFre_StHndDet2 was equal to VMMP_SINFCT_c_CusFctIn_HandsOn in the previous computation cycle\n_x000D_3) VSOCH_s_FlgACAHF_Ena was equal to true in the previous computation cycle\n_x000D_4) CustFctOut_HndFre_StDiagEve_for_StVld = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_ELSE:\n_x000D_Steering-Substitute-Reaction does not change\n_x000D_ \n_x000D_Note: Once set, Steering-Substitute-Reaction is executed is reset after the escalation time of 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps). Consequently Steering-Substitute-Reaction is executed is always set for 2.5 seconds (VMMP_ARB_p_ACAHndFre_EsclTi time steps).\n_x000D_ \n_x000D_Note:\n_x000D_Initial State is \"Steering-Substitute-Reaction is NOT executed\".\n_x000D_The state change is defined by the IF-Statements.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
230	42244151	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_HndFre_StDiagEve (considering: CRC Evaluation and Check Interface validity while HandsOff Calculation of output signal CustFctOut_HndFre_StDiagEve (considering: CRC Evaluation and Check Interface validity while HandsOff) IF: CRC NOT correct THEN: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld ELSEIF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld ELSE: CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld Raw { "ID": "42244151", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_HndFre_StDiagEve\n_x000D_(considering: CRC Evaluation and Check Interface validity while HandsOff)\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC NOT correct\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSEIF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSE:\n_x000D_CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld", "Type": "Pre Condition", "Status": "Released", "Summary": "Calculation of output signal CustFctOut_HndFre_StDiagEve", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Calculation of output signal CustFctOut_HndFre_StDiagEve\n_x000D_(considering: CRC Evaluation and Check Interface validity while HandsOff)\n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CRC NOT correct\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSEIF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_THEN:\n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_ \n_x000D_ELSE:\n_x000D_CustFctOut_HndFre_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
231	16660747	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirement describes the valid case of the HndFre Service Bridge. The following functional requirement describes the valid case of the HndFre Service Bridge. Raw { "ID": "16660747", "ASIL": " ", "Text": "The following functional requirement describes the valid case of the HndFre Service Bridge.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361467", "Description": "The following functional requirement describes the valid case of the HndFre Service Bridge.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
232	16660748	Functional	Released	yes	True		Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF [AND(1,2)]: 1) CustFctOut Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv) CustFctOut_HndFre_StHndDet1 = CustFctIn_HndFre_StHndDet1 CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd Raw { "ID": "16660748", "ASIL": " ASIL B", "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv)\n_x000D_CustFctOut_HndFre_StHndDet1 = CustFctIn_HndFre_StHndDet1\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp)\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd \n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd", "Type": "Functional", "Status": "Released", "Summary": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)", "Relevant": "yes", "column_12": "", "Foreign ID": "1361468", "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv)\n_x000D_CustFctOut_HndFre_StHndDet1 = CustFctIn_HndFre_StHndDet1\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp)\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd = CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd \n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
233	42219848	Functional	Re-evaluation	no	False	status_filtered, relevance_filtered	Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF [AND(1,2)]: 1) CustFctOut Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv) CustFctOut_HndFre_StHndDet1 is calculated by Calculation of output signal CustFctOut_HndFre_StHndDet1 CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp) CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd Raw { "ID": "42219848", "ASIL": " ASIL B", "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv)\n_x000D_CustFctOut_HndFre_StHndDet1 is calculated by Calculation of output signal CustFctOut_HndFre_StHndDet1\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) \n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd", "Type": "Functional", "Status": "Re-evaluation", "Summary": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = CustFctIn_HndFreLatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv)\n_x000D_CustFctOut_HndFre_StHndDet1 is calculated by Calculation of output signal CustFctOut_HndFre_StHndDet1\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty = CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq = CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq) \n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
234	16660749	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv, CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value. * All other Outputs will be frozen to the last valid value. Raw { "ID": "16660749", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv, CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Type": "Information", "Status": "", "Summary": "Note for different cases of errors", "Relevant": "no", "column_12": "", "Foreign ID": "1361469", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv, CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
235	23803247	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value. * CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value. * All other Outputs will be frozen to the last valid value. Raw { "ID": "23803247", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Type": "Information", "Status": "", "Summary": "Note for different cases of errors", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_HndFre_StHndDet1, CustFctOut_HndFreLatCtl_StAcv and CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
236	42219839	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. CustFctOut_HndFre_StHndDet1 are CustFctOut_HndFreLatCtl_StAcv are set to a defined value or frozen to the last valid value. * CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value. * All other Outputs will be frozen to the last valid value. Raw { "ID": "42219839", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_HndFre_StHndDet1 are CustFctOut_HndFreLatCtl_StAcv are set to a defined value or frozen to the last valid value.\n_x000D_* CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Type": "Information", "Status": "", "Summary": "Note for different cases of errors", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_HndFre_StHndDet1 are CustFctOut_HndFreLatCtl_StAcv are set to a defined value or frozen to the last valid value.\n_x000D_* CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp and CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
237	16660750	Functional	Released	yes	True		Disable Case: IF: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFct Disable Case: IF: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660750", "ASIL": " ASIL B", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Disable Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1361470", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
238	23839955	Functional	Released	yes	True		Disable Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi 2) Steering-Substitute-Reaction is NOT execu Disable Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23839955", "ASIL": " ASIL B", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_2) Steering-Substitute-Reaction is NOT executed \n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Disable Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_2) Steering-Substitute-Reaction is NOT executed \n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
239	42219907	Functional	Released	yes	True		Disable Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi 2) Steering-Substitute-Reaction is NOT execu Disable Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "42219907", "ASIL": " ASIL B", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_2) Steering-Substitute-Reaction is NOT executed \n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Disable Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_2) Steering-Substitute-Reaction is NOT executed \n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
240	16660751	Functional	Released	yes	True		NotVld Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld 2) Steering-Substitute-Reaction is NOT exe NotVld Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660751", "ASIL": " ASIL B", "Text": "NotVld Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "NotVld Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1361471", "Description": "NotVld Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
241	23840326	Functional	Released	yes	True		NotVld Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld 2) Steering-Substitute-Reaction is NOT exe NotVld Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23840326", "ASIL": " ASIL B", "Text": "NotVld Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "NotVld Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "NotVld Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
242	42219909	Functional	Released	yes	True		NotVld Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld 2) Steering-Substitute-Reaction is NOT exe NotVld Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "42219909", "ASIL": " ASIL B", "Text": "NotVld Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "NotVld Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "NotVld Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
243	16660752	Functional	Released	yes	True		Fail Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail 2) Steering-Substitute-Reaction is NOT execute Fail Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660752", "ASIL": " ASIL B", "Text": "Fail Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Fail Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1361472", "Description": "Fail Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
244	23840513	Functional	Released	yes	True		Fail Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail 2) Steering-Substitute-Reaction is NOT execute Fail Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23840513", "ASIL": " ASIL B", "Text": "Fail Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Fail Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Fail Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
245	42219910	Functional	Released	yes	True		Fail Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail 2) Steering-Substitute-Reaction is NOT execute Fail Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "42219910", "ASIL": " ASIL B", "Text": "Fail Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Fail Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Fail Case:\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
246	16660753	Functional	Released	yes	True		Init Case: IF: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFct Init Case: IF: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660753", "ASIL": " ASIL B", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Init Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1361473", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
247	23840560	Functional	Released	yes	True		Init Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni 2) Steering-Substitute-Reaction is NOT execu Init Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23840560", "ASIL": " ASIL B", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Init Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
248	42219917	Functional	Released	yes	True		Init Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni 2) Steering-Substitute-Reaction is NOT execu Init Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "42219917", "ASIL": " ASIL B", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Init Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFre_StHndDet1 = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
249	16660754	Functional	Released	yes	True		Susp Case: IF: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the val Susp Case: IF: CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660754", "ASIL": " ASIL B", "Text": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Susp Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1361474", "Description": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
250	23840561	Functional	Released	yes	True		Susp Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp 2) Steering-Substitute-Reaction is NOT execut Susp Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23840561", "ASIL": " ASIL B", "Text": "Susp Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Susp Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Susp Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
251	42219919	Functional	Released	yes	True		Susp Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp 2) Steering-Substitute-Reaction is NOT execut Susp Case: IF [AND(1,2)]: 1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp 2) Steering-Substitute-Reaction is NOT executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "42219919", "ASIL": " ASIL B", "Text": "Susp Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Susp Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Susp Case:\n_x000D_ \n_x000D_IF [AND(1,2)]: \n_x000D_1) CustFctOut_HndFre_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_2) Steering-Substitute-Reaction is NOT executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
252	16660755	Functional	Released	yes	True		Steering-Substitute-Reaction Case: IF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equa Steering-Substitute-Reaction Case: IF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660755", "ASIL": " ASIL B", "Text": "Steering-Substitute-Reaction Case:\n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Steering-Substitute-Reaction Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1361506", "Description": "Steering-Substitute-Reaction Case:\n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = is equal to the value of previous computation cycle (Hold Last Value) \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
253	23840591	Functional	Released	yes	True		Steering-Substitute-Reaction Case: IF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equa Steering-Substitute-Reaction Case: IF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value) All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23840591", "ASIL": " ASIL B", "Text": "Steering-Substitute-Reaction Case:\n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Steering-Substitute-Reaction Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Steering-Substitute-Reaction Case:\n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
254	42219926	Functional	Released	yes	True		Steering-Substitute-Reaction Case: IF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equa Steering-Substitute-Reaction Case: IF: Steering-Substitute-Reaction is executed THEN: CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value) CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0 All other Outputs = are equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "42219926", "ASIL": " ASIL B", "Text": "Steering-Substitute-Reaction Case:\n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Steering-Substitute-Reaction Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Steering-Substitute-Reaction Case:\n_x000D_ \n_x000D_IF:\n_x000D_Steering-Substitute-Reaction is executed\n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFre_StHndDet1 = is equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd = 0\n_x000D_All other Outputs = are equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
255	16660756	Information		no	False	type_not_target, status_filtered, relevance_filtered	Depending on whether ACA HF is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), the generic out Depending on whether ACA HF is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), the generic output signals of "LatCtl Service Bridge" or "HndFre Service Bridge" are mapped on the specific output signals. Outputs of "ACA HndFre Service" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true). Outputs of "ACA LatCtl Service" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false). Raw { "ID": "16660756", "ASIL": " ", "Text": "Depending on whether ACA HF is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), the generic output signals of \"LatCtl Service Bridge\" or \"HndFre Service Bridge\" are mapped on the specific output signals.\n_x000D_ \n_x000D_Outputs of \"ACA HndFre Service\" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true).\n_x000D_ \n_x000D_Outputs of \"ACA LatCtl Service\" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false).", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361563", "Description": "Depending on whether ACA HF is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), the generic output signals of \"LatCtl Service Bridge\" or \"HndFre Service Bridge\" are mapped on the specific output signals.\n_x000D_ \n_x000D_Outputs of \"ACA HndFre Service\" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true).\n_x000D_ \n_x000D_Outputs of \"ACA LatCtl Service\" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
256	16660757	Non-functional	Released	no	False	type_not_target, relevance_filtered	Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail). If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle). Raw { "ID": "16660757", "ASIL": " QM", "Text": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387710", "Description": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
257	16660758	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA Assign generic output signals to specific output signals Outputs IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: StAcv CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1 All other Outputs CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd States CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve ELSE: StAcv CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti All other Outputs CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd States CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone Raw { "ID": "16660758", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_\n_x000D_Outputs\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve\n_x000D_ \n_x000D_\n_x000D_ELSE: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone", "Type": "Functional", "Status": "Released", "Summary": "Assign generic output signals to specific output signals", "Relevant": "yes", "column_12": "", "Foreign ID": "1337981", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_\n_x000D_Outputs\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve\n_x000D_ \n_x000D_\n_x000D_ELSE: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACACrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
258	18432614	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBA Assign generic output signals to specific output signals Outputs IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: StAcv CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1 All other Outputs CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd States CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve ELSE: StAcv CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti All other Outputs CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd States CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone Raw { "ID": "18432614", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals \n_x000D_\n_x000D_ \n_x000D_Outputs \n_x000D_\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve\n_x000D_ \n_x000D_\n_x000D_ELSE: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone", "Type": "Functional", "Status": "Released", "Summary": "Assign generic output signals to specific output signals", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Assign generic output signals to specific output signals \n_x000D_\n_x000D_ \n_x000D_Outputs \n_x000D_\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve\n_x000D_ \n_x000D_\n_x000D_ELSE: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti\n_x000D_ \n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
259	59888430	Functional	in Progress	no	False	status_filtered, relevance_filtered	Assign generic output signals to specific output signals Outputs (all outputs except CFBACA_s_ACACrvtCtl_FlgGrdExtp) IF [AND( Assign generic output signals to specific output signals Outputs (all outputs except CFBACA_s_ACACrvtCtl_FlgGrdExtp) IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: StAcv CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1 All other Outputs CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd States CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve ELSE: StAcv CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti All other Outputs CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd States CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone Output CFBACA_s_ACACrvtCtl_FlgGrdExtp: IF: VMMP_CFBACA_p_ACALatCtl_SwSti = true THEN: CFBACA_s_ACACrvtCtl_FlgGrdExtp = VMMP_CFBACA_p_ACALatCtl_FlgGrdExtpSti ELSEIF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp ELSE: CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp Raw { "ID": "59888430", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals \n_x000D_\n_x000D_ \n_x000D_Outputs \n_x000D_\n_x000D_(all outputs except CFBACA_s_ACACrvtCtl_FlgGrdExtp)\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv\n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve \n_x000D_ ELSE: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv\n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone\n_x000D_ \n_x000D_Output CFBACA_s_ACACrvtCtl_FlgGrdExtp:\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = VMMP_CFBACA_p_ACALatCtl_FlgGrdExtpSti\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN:\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ELSE:\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp", "Type": "Functional", "Status": "in Progress", "Summary": "Assign generic output signals to specific output signals", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Assign generic output signals to specific output signals \n_x000D_\n_x000D_ \n_x000D_Outputs \n_x000D_\n_x000D_(all outputs except CFBACA_s_ACACrvtCtl_FlgGrdExtp)\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_HndFreLatCtl_StAcv\n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = CustFctOut_HndFre_StHndDet1\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = CustFctOut_HndFre_StDiagEve \n_x000D_ ELSE: \n_x000D_StAcv\n_x000D_CFBACA_s_ACALatCtl_StAcv = CustFctOut_LatCtl_StAcv\n_x000D_CFBACA_s_ACAHndFre_StHndDet1 = VMMP_CFBACA_p_ACAHndFre_StHndDet1Sti\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACACrvtCtl_CrvtDmd = CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CFBACA_s_ACACrvtCtl_CrvtGrdDmd = CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CFBACA_s_ACACrvtCtl_FacSsty = CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CFBACA_s_ACACrvtCtl_StLimCtlF = CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CFBACA_s_ACAStgStiCtl_AgOffStgWhlDmd = CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_States\n_x000D_CFBACA_s_DiagACALatCtl_StEve = CustFctOut_LatCtl_StDiagEve\n_x000D_CFBACA_s_DiagACAHFLatCtl_StEve = VMMP_c_DiagEveSigNone\n_x000D_ \n_x000D_Output CFBACA_s_ACACrvtCtl_FlgGrdExtp:\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = VMMP_CFBACA_p_ACALatCtl_FlgGrdExtpSti\n_x000D_ELSEIF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN:\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ELSE:\n_x000D_CFBACA_s_ACACrvtCtl_FlgGrdExtp = CustFctOut_LatCtlCrvtCtl_FlgGrdExtp", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
260	16660759	Functional	Released	yes	True		Trigger WarnBrake in case of communication error: IF [AND(1,2,3,4)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena Trigger WarnBrake in case of communication error: IF [AND(1,2,3,4)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true 3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection) 4) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq ELSEIF [AND(1,2,3,4)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true 3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection) 4) ACA_s_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq ELSE: CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step. Raw { "ID": "16660759", "ASIL": " ASIL B", "Text": "Trigger WarnBrake in case of communication error:\n_x000D_ \n_x000D_IF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection)\n_x000D_4) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection)\n_x000D_4) ACA_s_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff \n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft\n_x000D_ \n_x000D_Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step.", "Type": "Functional", "Status": "Released", "Summary": "Trigger WarnBrake in case of communication error", "Relevant": "yes", "column_12": "", "Foreign ID": "1361571", "Description": "Trigger WarnBrake in case of communication error:\n_x000D_ \n_x000D_IF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection)\n_x000D_4) ACA_s_HndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigFail (Edge Detection)\n_x000D_4) ACA_s_HndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff \n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft\n_x000D_ \n_x000D_Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
261	42212348	Functional	Released	yes	True		Trigger WarnBrake in case of communication error: IF [AND(1,2,3,4)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena Trigger WarnBrake in case of communication error: IF [AND(1,2,3,4)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true 3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection) 4) CFBACA_s_ACAHndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq ELSEIF [AND(1,2,3,4)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true 3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection) 4) CFBACA_s_ACAHndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff THEN: CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq ELSE: CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step. Raw { "ID": "42212348", "ASIL": " ASIL B", "Text": "Trigger WarnBrake in case of communication error:\n_x000D_ \n_x000D_IF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection)\n_x000D_4) CFBACA_s_ACAHndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection)\n_x000D_4) CFBACA_s_ACAHndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft\n_x000D_ \n_x000D_Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step.", "Type": "Functional", "Status": "Released", "Summary": "Trigger WarnBrake in case of communication error", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Trigger WarnBrake in case of communication error:\n_x000D_ \n_x000D_IF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection)\n_x000D_4) CFBACA_s_ACAHndFre_StHndDet1 = VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2,3,4)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_3) CustFctOut_HndFre_StDiagEve switch form VMMP_c_DiagEveSigSusp to VMMP_c_DiagEveSigNotVld (Edge Detection)\n_x000D_4) CFBACA_s_ACAHndFre_StHndDet1 of the previous computation cycle is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_THEN: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CFBACA_s_ACAHFComErrWarnBrk_ItReq = VMMP_CFBACA_p_ACAHFComErrWarnBrk_Dft\n_x000D_ \n_x000D_Note: CFBACA_s_ACAHFComErrWarnBrk_ItReq is only set to VMMP_CFBACA_p_ACAHFComErrWarnBrk_ItReq for one time step.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
262	16660760	Information		no	False	type_not_target, status_filtered, relevance_filtered	Depending on whether ACA HF is coded and enabled, the output signal CFBACA_s_ACALatCtl_StVld is defined by CustFctOut_LatCtl_StDia Depending on whether ACA HF is coded and enabled, the output signal CFBACA_s_ACALatCtl_StVld is defined by CustFctOut_LatCtl_StDiagEve or CustFctOut_HndFre_StDiagEve_for_StVld. Raw { "ID": "16660760", "ASIL": " ", "Text": "Depending on whether ACA HF is coded and enabled, the output signal CFBACA_s_ACALatCtl_StVld is defined by CustFctOut_LatCtl_StDiagEve or CustFctOut_HndFre_StDiagEve_for_StVld.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361555", "Description": "Depending on whether ACA HF is coded and enabled, the output signal CFBACA_s_ACALatCtl_StVld is defined by CustFctOut_LatCtl_StDiagEve or CustFctOut_HndFre_StDiagEve_for_StVld.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
263	16660761	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Assignment for Mapping (ACA LatCtl and ACA HndFre): IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena i Assignment for Mapping (ACA LatCtl and ACA HndFre): IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld ELSE: StDiagEve = CustFctOut_LatCtl_StDiagEve Raw { "ID": "16660761", "ASIL": " ASIL B", "Text": "Assignment for Mapping (ACA LatCtl and ACA HndFre):\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_\n_x000D_THEN: \n_x000D_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld\n_x000D_\n_x000D_ELSE: \n_x000D_StDiagEve = CustFctOut_LatCtl_StDiagEve", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1338092", "Description": "Assignment for Mapping (ACA LatCtl and ACA HndFre):\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_\n_x000D_THEN: \n_x000D_StDiagEve = CustFctOut_HndFre_StDiagEve_for_StVld\n_x000D_\n_x000D_ELSE: \n_x000D_StDiagEve = CustFctOut_LatCtl_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
264	16660762	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping StDiagEve to StVld IF: StDiagEve = VMMP_c_DiagEveSigNotVld THEN: StVld = 3 ELSEIF: StDiagEve = VMMP_c_DiagEveS Mapping StDiagEve to StVld IF: StDiagEve = VMMP_c_DiagEveSigNotVld THEN: StVld = 3 ELSEIF: StDiagEve = VMMP_c_DiagEveSigFail THEN: StVld = 3 ELSEIF: StDiagEve = VMMP_c_DiagEveSigDi THEN: StVld = 2 ELSEIF: StDiagEve = VMMP_c_DiagEveSigIni THEN: StVld = 2 ELSEIF: StDiagEve = VMMP_c_DiagEveSigSusp THEN: StVld = 0 ELSEIF: StDiagEve = VMMP_c_DiagEveSigNone THEN: StVld = 1 Raw { "ID": "16660762", "ASIL": " ASIL B", "Text": "Mapping StDiagEve to StVld\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN:\n_x000D_StVld = 0\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN:\n_x000D_StVld = 1", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337990", "Description": "Mapping StDiagEve to StVld\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN:\n_x000D_StVld = 0\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN:\n_x000D_*StVld = 1", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
265	16660763	Functional	Released	yes	True		Determine CFBACA_s_ACALatCtl_StVld: CFBACA_s_ACALatCtl_StVld = StVld (considering: Assignment for Mapping (ACA LatCtl and ACA H Determine CFBACA_s_ACALatCtl_StVld: CFBACA_s_ACALatCtl_StVld = StVld (considering: Assignment for Mapping (ACA LatCtl and ACA HndFre): and Mapping StDiagEve to StVld) Raw { "ID": "16660763", "ASIL": " ASIL B", "Text": "Determine CFBACA_s_ACALatCtl_StVld:\n_x000D_ \n_x000D_CFBACA_s_ACALatCtl_StVld = StVld\n_x000D_(considering: Assignment for Mapping (ACA LatCtl and ACA HndFre): and Mapping StDiagEve to StVld)", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1361557", "Description": "Determine CFBACA_s_ACALatCtl_StVld:\n_x000D_ \n_x000D_CFBACA_s_ACALatCtl_StVld = StVld\n_x000D_(considering: Assignment for Mapping (ACA LatCtl and ACA HndFre): and Mapping StDiagEve to StVld)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
266	16660764	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA WarnBrk Service ACA WarnBrk Service Raw { "ID": "16660764", "ASIL": " ", "Text": "ACA WarnBrk Service", "Type": "Folder", "Status": "", "Summary": "ACA WarnBrk Service", "Relevant": "no", "column_12": "", "Foreign ID": "1337995", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
267	16660765	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctI Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq Signal-Classifier: CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq Parameters CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff Raw { "ID": "16660765", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet\n_x000D_CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv\n_x000D_CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "1337993", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet\n_x000D_CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv\n_x000D_CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
268	59829213	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACAWarnBrk_SwSti = true THEN: CustFctIn_WarnBrk_ItReq = VMMP_CFBACA_p_ACAWarnBrk_ItReqSti ELSE: CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq Signal-Classifier: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACAWarnBrk_SwSti = true THEN: CustFctIn_WarnBrk_ItReq_sc = 0 ELSE: CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq Parameters CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff Raw { "ID": "59829213", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACAWarnBrk_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_WarnBrk_ItReq = VMMP_CFBACA_p_ACAWarnBrk_ItReqSti \n_x000D_ELSE:\n_x000D_CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq\n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACAWarnBrk_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_WarnBrk_ItReq_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet\n_x000D_CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv\n_x000D_CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACAWarnBrk_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_WarnBrk_ItReq = VMMP_CFBACA_p_ACAWarnBrk_ItReqSti \n_x000D_ELSE:\n_x000D_CustFctIn_WarnBrk_ItReq = ACA_s_WarnBrk_ItReq\n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACAWarnBrk_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_WarnBrk_ItReq_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_WarnBrk_ItReq_sc = ACA_sc_WarnBrk_ItReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_WarnBrk_FlgIniExcDet = VMMP_CFBACA_c_ACAWarnBrk_FlgIniExcDet\n_x000D_CustFctIn_WarnBrk_FlgErrQlfAcv = VMMP_CFBACA_c_ACAWarnBrk_FlgErrQlfAcv\n_x000D_CustFctIn_WarnBrk_TurnOff = VMMP_CFBACA_p_ACAWarnBrk_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
269	16660766	Pre Condition	Released	no	False	type_not_target, relevance_filtered	RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA WarnBrk-Service: Signal range is valid is always RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA WarnBrk-Service: Signal range is valid is always applied. (Signal range is invalid is never applied) Raw { "ID": "16660766", "ASIL": " ASIL B", "Text": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA WarnBrk-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337996", "Description": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA WarnBrk-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
270	16660767	Non-functional	Released	no	False	type_not_target, relevance_filtered	Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail). If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle). Raw { "ID": "16660767", "ASIL": " QM", "Text": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387706", "Description": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
271	16660768	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs Request CFBACA_s_ACAWarnBrk_ItReq = CustFctOut_WarnBrk_ItReq Assign generic output signals to specific output signals Outputs Request CFBACA_s_ACAWarnBrk_ItReq = CustFctOut_WarnBrk_ItReq States CFBACA_s_DiagACAWarnBrk_StEve = CustFctOut_WarnBrk_StDiagEve Raw { "ID": "16660768", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_\n_x000D_Outputs\n_x000D_Request\n_x000D_CFBACA_s_ACAWarnBrk_ItReq = CustFctOut_WarnBrk_ItReq\n_x000D_States\n_x000D_CFBACA_s_DiagACAWarnBrk_StEve = CustFctOut_WarnBrk_StDiagEve", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337998", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_\n_x000D_Outputs\n_x000D_Request\n_x000D_CFBACA_s_ACAWarnBrk_ItReq = CustFctOut_WarnBrk_ItReq\n_x000D_States\n_x000D_CFBACA_s_DiagACAWarnBrk_StEve = CustFctOut_WarnBrk_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
272	16660769	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA StgWhlVib Service ACA StgWhlVib Service Raw { "ID": "16660769", "ASIL": " ", "Text": "ACA StgWhlVib Service", "Type": "Folder", "Status": "", "Summary": "ACA StgWhlVib Service", "Relevant": "no", "column_12": "", "Foreign ID": "1338005", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
273	16660770	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctI Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_StgWhlVib_IdxProfReq = ACA_s_StgWhlVib_IdxProfReq Signal-Classifier: CustFctIn_StgWhlVib_IdxProfReq_sc = ACA_sc_StgWhlVib_IdxProfReq Parameters CustFctIn_StgWhlVib _FlgIniExcDet = VMMP_CFBACA_c_ACAStgWhlVib_FlgIniExcDet CustFctIn_StgWhlVib _FlgErrQlfAcv = VMMP_CFBACA_c_ACAStgWhlVib_FlgErrQlfAcv CustFctIn_StgWhlVib _TurnOff = VMMP_CFBACA_p_ACAStgWhlVib_TurnOff Raw { "ID": "16660770", "ASIL": " QM", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq = ACA_s_StgWhlVib_IdxProfReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq_sc = ACA_sc_StgWhlVib_IdxProfReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_StgWhlVib _FlgIniExcDet = VMMP_CFBACA_c_ACAStgWhlVib_FlgIniExcDet\n_x000D_CustFctIn_StgWhlVib _FlgErrQlfAcv = VMMP_CFBACA_c_ACAStgWhlVib_FlgErrQlfAcv\n_x000D_CustFctIn_StgWhlVib _TurnOff = VMMP_CFBACA_p_ACAStgWhlVib_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1338003", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq = ACA_s_StgWhlVib_IdxProfReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq_sc = ACA_sc_StgWhlVib_IdxProfReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_StgWhlVib _FlgIniExcDet = VMMP_CFBACA_c_ACAStgWhlVib_FlgIniExcDet\n_x000D_CustFctIn_StgWhlVib _FlgErrQlfAcv = VMMP_CFBACA_c_ACAStgWhlVib_FlgErrQlfAcv\n_x000D_CustFctIn_StgWhlVib _TurnOff = VMMP_CFBACA_p_ACAStgWhlVib_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
274	16660771	Pre Condition	Released	no	False	type_not_target, relevance_filtered	RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA StgWhlVib-Service: Signal range is valid is alway RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA StgWhlVib-Service: Signal range is valid is always applied. (Signal range is invalid is never applied) Raw { "ID": "16660771", "ASIL": " QM", "Text": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA StgWhlVib-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1338006", "Description": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA StgWhlVib-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
275	16660772	Non-functional	Released	no	False	type_not_target, relevance_filtered	Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail). If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle). Raw { "ID": "16660772", "ASIL": " QM", "Text": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387707", "Description": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
276	16660773	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACAStgWhlVib_SwSti= true THEN: CFBACA_s_ Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACAStgWhlVib_SwSti= true THEN: CFBACA_s_ACAStgWhlVib_IdxProfReq = VMMP_CFBACA_p_ACAStgWhlVib_IdxProfReqSti ELSE: CFBACA_s_ACAStgWhlVib_IdxProfReq = CustFctOut_StgWhlVib_IdxProfReq Note: The assignment of the following signals is independent of the IF statement above. States CFBACA_s_DiagACAStgWhlVib_StEve = CustFctOut_StgWhlVib_StDiagEve Raw { "ID": "16660773", "ASIL": " QM", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_\n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACAStgWhlVib_SwSti= true\n_x000D_THEN: \n_x000D_CFBACA_s_ACAStgWhlVib_IdxProfReq = VMMP_CFBACA_p_ACAStgWhlVib_IdxProfReqSti\n_x000D_ELSE:\n_x000D_CFBACA_s_ACAStgWhlVib_IdxProfReq = CustFctOut_StgWhlVib_IdxProfReq\n_x000D_ \n_x000D_Note: The assignment of the following signals is independent of the IF statement above.\n_x000D_States\n_x000D_CFBACA_s_DiagACAStgWhlVib_StEve = CustFctOut_StgWhlVib_StDiagEve", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1338007", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_\n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACAStgWhlVib_SwSti= true\n_x000D_THEN: \n_x000D_CFBACA_s_ACAStgWhlVib_IdxProfReq = VMMP_CFBACA_p_ACAStgWhlVib_IdxProfReqSti\n_x000D_ELSE:\n_x000D_CFBACA_s_ACAStgWhlVib_IdxProfReq = CustFctOut_StgWhlVib_IdxProfReq\n_x000D_ \n_x000D_Note: The assignment of the following signals is independent of the IF statement above.\n_x000D_States\n_x000D_CFBACA_s_DiagACAStgWhlVib_StEve = CustFctOut_StgWhlVib_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
277	16660774	Functional	Released	yes	True		The output signals CFBACA_s_ACALgtCtl_StVld and CFBACA_s_ACALatCtl_StVld must always have the values 0, 1, 2 or 3. To test this r The output signals CFBACA_s_ACALgtCtl_StVld and CFBACA_s_ACALatCtl_StVld must always have the values 0, 1, 2 or 3. To test this requirement no separate test is necessary. Every implemented test case should check the signal range of StVld in the end. Raw { "ID": "16660774", "ASIL": " QM", "Text": "The output signals CFBACA_s_ACALgtCtl_StVld and CFBACA_s_ACALatCtl_StVld must always have the values 0, 1, 2 or 3.\n_x000D_ \n_x000D_To test this requirement no separate test is necessary. Every implemented test case should check the signal range of StVld in the end.", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1338871", "Description": "The output signals CFBACA_s_ACALgtCtl_StVld and CFBACA_s_ACALatCtl_StVld must always have the values 0, 1, 2 or 3.\n_x000D_ \n_x000D_To test this requirement no separate test is necessary. Every implemented test case should check the signal range of *StVld in the end.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }

Source files

Mapping profiles

Import history

VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBACA.xlsx · source records

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