Source files

Mapping profiles

Import history

File	Kind	Rows	Checksum
VME-PROD-VehicleMotionManagement - VMMP_ARB_ARBLACSC.xlsx	requirement	96	6c313a49d7cf
VME-PROD-VehicleMotionManagement - VMMP.xlsx	requirement	297	dcdcc7aa02b4

VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBACA.xlsx · source records


Inputs 

Signal-Values:

CustFctIn_LatCtl_StAcv 

CustFctIn_LatCtlCrvtCtl_CrvtDmd 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd 

CustFctIn_LatCtlCrvtCtl_FacSsty 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq

CustFctIn_CrvtCtl_CrvtDmdTiStamp

CustFctIn_LatCtlSlipAgCtl_AgDmd 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_LatCtl_StAcv_sc 

CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_LatCtlCrvtCtl_FacSsty_sc 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc

Parameters 

CustFctIn_LatCtl_FlgIniExcDet

CustFctIn_LatCtl_FlgErrQlfAcv

CustFctIn_LatCtl_TurnOff
Outputs

StAcv

CustFctOut_LatCtl_StAcv

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp

CustFctOut_LatCtlSlipAgCtl_FlgAcv

All other Outputs

CustFctOut_LatCtlCrvtCtl_CrvtDmd

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd

CustFctOut_LatCtlCrvtCtl_FacSsty

CustFctOut_LatCtlCrvtCtl_StLimCtlFReq

CustFctOut_LatCtlSlipAgCtl_AgDmd

CustFctOut_LatCtlSlipAgCtl_AgGrdDmd

CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd

States

CustFctOut_LatCtl_StDiagEve
Merged classifier of LatCtl input signal classifiers

(Note: The classifier information of all LatCtl input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_LatCtl_StAcv_sc 

CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_LatCtlCrvtCtl_FacSsty_sc 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc

THEN:

the corresponding Bits of the merged classifier (internal) are true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) are false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)
Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv

IF: 

CustFctIn_LatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

THEN: 

CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq

ELSEIF [AND(1,2)]: 

1) CustFctIn_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

2) Bit1 of BitwiseOR (

CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_LatCtlCrvtCtl_FacSsty_sc

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc) 

is set 

THEN: 

CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq

ELSE: 

CustFctOut_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv
Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq 

IF: 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi 

THEN: 

CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq

ELSE:

CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq
Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp 

IF:

CustFctIn_CrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle

THEN:

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 1 (true)

ELSE:

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)
Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv 

IF:

Bit1 of BitwiseOR (

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc)

is set

THEN:

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

ELSE:

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 1 (true)
LatCtl Service Bridge shall use Signalmonitoring with following signal assignment:

Input:

*TurnOff equal to CustFctIn_LatCtl_TurnOff

*FlgIniExcDet equal to CustFctIn_LatCtl_FlgIniExcDet

*FlgErrQlfAcv equal to CustFctIn_LatCtl_FlgErrQlfAcv

merged classifier

RangeCheck

Output:

CustFctOut_LatCtl_StDiagEve equal to *StDiagEve

Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).

Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:

specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information

(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)
The following functional requirement describes the valid case of the LatCtl Service Bridge.

Note:

The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "*_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.

* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

* 

 Disable Case:

* 

 NotVld Case:

* 

 Fail Case:

* 

 Init Case:

* 

 Susp Case:

For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.
Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNone

THEN: 

CustFctOut_LatCtl_StAcv = CustFctIn_LatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv)

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = CustFctIn_CrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp)

CustFctOut_LatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv

CustFctOut_LatCtlCrvtCtl_CrvtDmd = CustFctIn_LatCtlCrvtCtl_CrvtDmd 

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd 

CustFctOut_LatCtlCrvtCtl_FacSsty = CustFctIn_LatCtlCrvtCtl_FacSsty 

CustFctOut_LatCtlCrvtCtl_StLimCtlFReq = CustFctIn_LatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq) 

CustFctOut_LatCtlSlipAgCtl_AgDmd = CustFctIn_LatCtlSlipAgCtl_AgDmd 

CustFctOut_LatCtlSlipAgCtl_AgGrdDmd = CustFctIn_LatCtlSlipAgCtl_AgGrdDmd 

CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_LatCtl_StAcv, CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.

* All other Outputs will be frozen to the last valid value.
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_LatCtl_StAcv and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.

* CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.

* All other Outputs will be frozen to the last valid value.
Disable Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Disable Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
NotVld Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
NotVld Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Fail Case:

IF: 

CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Fail Case:

IF: 

CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Init

 Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Init

 Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Susp Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp shall be equal to the value of previous computation cycle (Hold Last Value) 

CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
Susp Case:

IF: 

CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)

CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 

CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)
WarnBrk Service Bridge
Inputs 

Signal-Values:

CustFctIn_WarnBrk_ItReq 

Signal-Classifier:

CustFctIn_WarnBrk_ItReq_sc

Parameters 

CustFctIn_WarnBrk_FlgIniExcDet

CustFctIn_WarnBrk_FlgErrQlfAcv

CustFctIn_WarnBrk_TurnOff
Outputs

Request

CustFctOut_WarnBrk_ItReq

States

CustFctOut_WarnBrk_StDiagEve
Merged classifier of WarnBrk input signal classifiers

(Note: The classifier information of all WarnBrk input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_WarnBrk_ItReq_sc

THEN:

the corresponding Bits of the merged classifier (internal) are true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) are false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)
Mapping of CustFctIn_WarnBrk_ItReq 

IF: 

CustFctIn_WarnBrk_ItReq > VMMP_SINFCT_c_SrvWarnBrk_ItReqRngLimHi 

THEN: 

CustFctOut_WarnBrk_ItReq is equal to VMMP_c_StReqCusFctNoReq

ELSE:

CustFctOut_WarnBrk_ItReq is equal to CustFctIn_WarnBrk_ItReq
WarnBrk Service Bridge shall use Signalmonitoring with following signal assignment:

Input:

*TurnOff equal to CustFctIn_WarnBrk_TurnOff

*FlgIniExcDet equal to CustFctIn_WarnBrk_FlgIniExcDet

*FlgErrQlfAcv equal to CustFctIn_WarnBrk_FlgErrQlfAcv

merged classifier

RangeCheck

Output:

CustFctOut_WarnBrk_StDiagEve equal to *StDiagEve

Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).

Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:

specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information

(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)
The following functional requirement describes the valid case of the WarnBrk Service Bridge.

Note:

The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "*_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.

* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

* 

 Disable Case:

* 

 NotVld Case:

* 

 Fail Case:

* 

 Init Case:

* 

 Susp Case:

For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.
Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF: 

CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNone

THEN: 

CustFctOut_WarnBrk_ItReq = CustFctIn_WarnBrk_ItReq (considering Mapping of CustFctIn_WarnBrk_ItReq)
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.
Disable Case:

IF: 

CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq
NotVld Case:

IF: 

CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN: 

CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq
Fail Case:

IF: 

CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigFail

THEN: 

CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq
Init

 Case:

IF: 

CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq
Susp Case:

IF: 

CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_WarnBrk_ItReq shall be equal to the value of previous computation cycle (Hold Last Value)
StgWhlVib Service Bridge
Inputs 

Signal-Values:

CustFctIn_StgWhlVib_IdxProfReq 

Signal-Classifier:

CustFctIn_StgWhlVib_IdxProfReq_sc

Parameters 

CustFctIn_StgWhlVib_FlgIniExcDet

CustFctIn_StgWhlVib_FlgErrQlfAcv

CustFctIn_StgWhlVib_TurnOff
Outputs

Request

CustFctOut_StgWhlVib_IdxProfReq

States

CustFctOut_StgWhlVib_StDiagEve
Merged classifier of StgWhlVib input signal classifiers

(Note: The classifier information of all StgWhlVib input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_StgWhlVib_IdxProfReq_sc

THEN:

the corresponding Bits of the merged classifier (internal) are true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) are false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)
StgWhlVib Service Bridge shall use Signalmonitoring with following signal assignment:

Input:

*TurnOff equal to CustFctIn_StgWhlVib _TurnOff

*FlgIniExcDet equal to CustFctIn_StgWhlVib _FlgIniExcDet

*FlgErrQlfAcv equal to CustFctIn_StgWhlVib _FlgErrQlfAcv

merged classifier

RangeCheck

Output:

CustFctOut_StgWhlVib _StDiagEve equal to *StDiagEve

Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).

Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:

specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information

(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)
The following functional requirement describes the valid case of the StgWhlVib Service Bridge.

Note:

The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "*_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.

* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

* 

 Disable Case:

* 

 NotVld Case:

* 

 Fail Case:

* 

 Init Case:

* 

 Susp Case:

For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.
Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF: 

CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNone

THEN: 

CustFctOut_StgWhlVib_IdxProfReq = CustFctIn_StgWhlVib_IdxProfReq
The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.
Disable Case:

IF: 

CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq
NotVld Case:

IF: 

CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN: 

CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq
Fail Case:

IF: 

CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigFail

THEN: 

CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq
Init

 Case:

IF: 

CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq
Susp Case:

IF: 

CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_StgWhlVib_IdxProfReq shall be equal to the value of previous computation cycle (Hold Last Value)
Specific Conditions and Requirements
The module output values in the initial timestep are not equal to the defined Init Values in the signal specification file.

It is not necessary to check the output values of the modul within the initial timestep.
ACA LgtLimA Service
In Cluster 1 to 4 (K-Matrix 12.06.00) ACA LgtLimA Service uses the BUS signals of CAA LgtLimA Service.

The usage of CAA signals is not a mistake.

Since Cluster 5 (K-Matrix 12.07.00) ACA LgtLimA signal set exists.
Replace generic input signals by specific input signal values, signal classifiers and parameters

Inputs

Signal-Values:

CustFctIn_LgtLimA_StAcv = CAA_s_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd = CAA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar = CAA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_AGrdMaxDec = 0 

CustFctIn_LgtLimA _AGrdMaxInc = 0 

CustFctIn_LgtLimA _ATlrHiTar = CAA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_ATlrHiDyn = CAA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_MdTarDyn = 0 

Signal-Classifier:

CustFctIn_LgtLimA_StAcv_sc = CAA_sc_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd_sc = CAA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar_sc = CAA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 

CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 

CustFctIn_LgtLimA _ATlrHiTar_sc = CAA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_ATlrHiDyn_sc = CAA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_MdTarDyn_sc = 0

Parameters 

CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff
Replace generic input signals by specific input signal values, signal classifiers and parameters 

Inputs

Signal-Values:

CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_MdTarDyn = 0 

Signal-Classifier:

CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_MdTarDyn_sc = 0

Parameters 

CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff
Replace generic input signals by specific input signal values, signal classifiers and parameters 

Inputs

Signal-Values:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACALgtLimA_SwSti = true

THEN:

CustFctIn_LgtLimA_StAcv = VMMP_CFBACA_p_ACALgtLimA_StAcvSti 

CustFctIn_LgtLimA_ADmd = VMMP_CFBACA_p_ACALgtLimA_ADmdSti 

CustFctIn_LgtLimA_APredTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti 

CustFctIn_LgtLimA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxDecSti 

CustFctIn_LgtLimA _AGrdMaxInc = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxIncSti 

CustFctIn_LgtLimA _ATlrHiTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti 

CustFctIn_LgtLimA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtLimA_ADmdSti 

CustFctIn_LgtLimA_MdTarDyn = 0

ELSE:

CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_MdTarDyn = 0 

Signal-Classifier:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACALgtLimA_SwSti = true

THEN:

CustFctIn_LgtLimA_StAcv_sc = 0 

CustFctIn_LgtLimA_ADmd_sc = 0 

CustFctIn_LgtLimA_APredTar_sc = 0 

CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 

CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 

CustFctIn_LgtLimA _ATlrHiTar_sc = 0 

CustFctIn_LgtLimA_ATlrHiDyn_sc = 0 

CustFctIn_LgtLimA_MdTarDyn_sc = 0

ELSE:

CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_MdTarDyn_sc = 0

Parameters 

CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff
RangeCheck: Check if input signal range is valid

There is no RangeCheck for ACA LgtLimA-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)
Saturation of input signal

The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_ACA.

* CAA_s_LgtLimA_ADmd
Saturation of input signal

The following input signals must be saturated to the maximum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimLo_ACA.

* ACA_s_LgtLimA_ADmd
Fault Tolerant Time Interval (FTTI) 

Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).

If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).
Assign generic output signals to specific output signals

Outputs

StAcv

CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv

All other Outputs

CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd

CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar

CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar

CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn

Note: The assignment of the signals above is independent of the following IF statement.

States

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN: 

CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve

ELSE: 

CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi
Assign generic output signals to specific output signals

Outputs

StAcv

CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv

All other Outputs

CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd

CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar

CFBACA_s_ACALgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec

CFBACA_s_ACALgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc

CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar

CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn

Note: The assignment of the signals above is independent of the following IF statement.

States

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN: 

CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve

ELSE: 

CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi
ACA LgtCtl Service
Replace generic input signals by specific input signal values, signal classifiers and parameters

Inputs

Signal-Values:

CustFctIn_LgtCtl_StAcv = ACA_s_LgtCtl_StAcv 

CustFctIn_LgtCtlCtlA_ADmd = ACA_s_LgtCtlA_ADmd 

CustFctIn_LgtCtlCtlA_APredTar = ACA_s_LgtCtlA_APredTar 

CustFctIn_LgtCtlCtlA_AGrdMaxDec = ACA_s_LgtCtlA_AGrdMaxDec 

CustFctIn_LgtCtlCtlA_AGrdMaxInc = ACA_s_LgtCtlA_AGrdMaxInc 

CustFctIn_LgtCtlCtlA_ATlrHiTar = ACA_s_LgtCtlA_ATlrHiTar 

CustFctIn_LgtCtlCtlA_ATlrHiDyn = ACA_s_LgtCtlA_ATlrHiDyn 

CustFctIn_LgtCtlCtlA_ATlrLoTar = ACA_s_LgtCtlA_ATlrLoTar 

CustFctIn_LgtCtlCtlA_MdDeceOnly = ACA_s_LgtCtlA_MdDeceOnly 

CustFctIn_LgtCtlCtlA_MdTarDyn = ACA_s_LgtCtlA_MdTarDyn 

CustFctIn_LgtCtlLimD_StAcv = ACA_s_LgtLimD_StAcv 

CustFctIn_LgtCtlLimD_DTar = ACA_s_LgtLimD_DTar 

CustFctIn_LgtCtlLimD_StUpd = ACA_s_LgtLimD_StUpd 

CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd = ACA_s_LgtStgy_TiRdyDrvOffDmd 

CustFctIn_LgtCtl_StSailReq = ACA_s_LgtCtl_StSailReq

Signal-Classifier:

CustFctIn_LgtCtl_StAcv_sc = ACA_sc_LgtCtl_StAcv 

CustFctIn_LgtCtlCtlA_ADmd_sc = ACA_sc_LgtCtlA_ADmd 

CustFctIn_LgtCtlCtlA_APredTar_sc = ACA_sc_LgtCtlA_APredTar 

CustFctIn_LgtCtlCtlA_AGrdMaxDec_sc = ACA_sc_LgtCtlA_AGrdMaxDec 

CustFctIn_LgtCtlCtlA_AGrdMaxInc_sc = ACA_sc_LgtCtlA_AGrdMaxInc 

CustFctIn_LgtCtlCtlA_ATlrHiTar_sc = ACA_sc_LgtCtlA_ATlrHiTar 

CustFctIn_LgtCtlCtlA_ATlrHiDyn_sc = ACA_sc_LgtCtlA_ATlrHiDyn 

CustFctIn_LgtCtlCtlA_ATlrLoTar_sc = ACA_sc_LgtCtlA_ATlrLoTar 

CustFctIn_LgtCtlCtlA_MdDeceOnly_sc = ACA_sc_LgtCtlA_MdDeceOnly 

CustFctIn_LgtCtlCtlA_MdTarDyn_sc = ACA_sc_LgtCtlA_MdTarDyn 

CustFctIn_LgtCtlLimD_StAcv_sc = ACA_sc_LgtLimD_StAcv 

CustFctIn_LgtCtlLimD_DTar_sc = ACA_sc_LgtLimD_DTar 

CustFctIn_LgtCtlLimD_StUpd_sc = ACA_sc_LgtLimD_StUpd 

CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd_sc = ACA_sc_LgtStgy_TiRdyDrvOffDmd 

CustFctIn_LgtCtl_StSailReq_sc = ACA_sc_LgtCtl_StSailReq

Parameters 

CustFctIn_LgtCtl_BitFldConf = VMMP_CFBACA_p_ACALgtCtl_BitFldConf

CustFctIn_LgtCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALgtCtl_FlgIniExcDet

CustFctIn_LgtCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtCtl_FlgErrQlfAcv

CustFctIn_LgtCtl_TurnOff = VMMP_CFBACA_p_ACALgtCtl_TurnOff
RangeCheck: Check if input signal range is valid

There is no RangeCheck for ACA LgtCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)
Saturation of input signals

The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimHi_Dft and to the minimum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimLo_Dft.

* ACA_s_LgtCtlA_ADmd

* ACA_s_LgtCtlA_APredTar

* ACA_s_LgtCtlA_ATlrHiTar

* ACA_s_LgtCtlA_ATlrHiDyn

* ACA_s_LgtCtlA_ATlrLoTar
Fault Tolerant Time Interval (FTTI) 

Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).

If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).
Assign generic output signals to specific output signals

Outputs

IF: 

VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true

THEN: 

CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti

CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti 

CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti 

CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti 

CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti 

CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti 

CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti 

CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti 

CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti 

CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti 

CFBACA_s_ACALgtCtl_StAcvLimD = VMMP_CFBACA_p_ACALgtCtl_StAcvLimDSti 

CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti 

CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti 

CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti 

CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti

ELSE:

StAcv

CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv

All other Outputs

CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd

CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar

CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec

CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc

CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar

CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn

CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar

CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly

CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn

CFBACA_s_ACALgtCtl_StAcvLimD = CustFctOut_LgtCtlLimD_StAcv

CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar

CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd

CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd

CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq

Note: The assignment of the following signals is independent of the IF statement above.

States

CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve
Assign generic output signals to specific output signals

Outputs

IF: 

VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true

THEN: 

CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti

CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti

CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti 

CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti 

CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti 

CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti 

CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti 

CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti 

CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti 

CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti 

CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti 

CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti 

CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti 

CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti 

CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti

ELSE:

StAcv

CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv

FlgAcv

CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv

All other Outputs

CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd

CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar

CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec

CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc

CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar

CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn

CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar

CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly

CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn

CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar

CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd

CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd

CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq

Note: The assignment of the following signals is independent of the IF statement above.

States

CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve
Assign generic output signals to specific output signals

Outputs

IF: 

VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true

THEN: 

CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti

CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti

CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti 

CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti 

CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti 

CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti 

CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti 

CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti 

CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti 

CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti 

CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti 

CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti 

CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti 

CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti 

CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti

CFBACA_s_DiagACALgtCtl_StEve = VMMP_CFBACA_p_ACALgtCtl_DiagEveSti

ELSE:

StAcv

CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv

FlgAcv

CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv

All other Outputs

CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd

CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar

CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec

CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc

CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar

CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn

CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar

CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly

CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn

CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar

CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd

CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd

CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq

States

CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve
The output signal CFBACA_s_ACALgtCtl_StVld is defined by the merged *StDiagEve signals of ACA LgtLimA and ACA LgtCtl service.

Therefore CustFctOut_LgtCtl_StDiagEve as well as CustFctOut_LgtLimA_StDiagEve or VMMP_c_DiagEveSigNone depending on VSOCH_s_FlgACAHF_Ena and VMMP_CFBACA_p_ACAHF_Ena shall be used for calculation of *StDiagEve in the following PreCondition.
Assignment for Mapping (ACA LgtLimA and ACA LgtCtl):

*StDiagEve = CustFctOut_LgtCtl_StDiagEve

Note: The assignment of the signals above is independent of the following IF statement.

IF [AND(1,2)]:

1) VSOCH_s_FlgACAHF_Ena is true

2) VMMP_CFBACA_p_ACAHF_Ena is true

THEN: 

*StDiagEve = CustFctOut_LgtLimA_StDiagEve

ELSE: 

*StDiagEve = VMMP_c_DiagEveSigNone
Mapping *StDiagEve to *StVld

IF: 

*StDiagEve = VMMP_c_DiagEveSigNotVld

THEN:

*StVld = 3

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigFail

THEN:

*StVld = 3

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigDi

THEN:

*StVld = 2

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigIni

THEN:

*StVld = 2

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigSusp

THEN:

*StVld = 0

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigNone

THEN:

*StVld = 1
Merging several *StVld to one *StVld considering prioritization:

CFBACA_s_ACALgtCtl_StVld = *StVld

(considering: Assignment for Mapping (ACA LgtLimA and ACA LgtCtl): and Mapping *StDiagEve to *StVld)

Prioritization if different *StVld values are set at the same time (based on *StDiagEve):

Prio 1: *StVld = 3 (Failure)

Prio 2: *StVld = 2 (Init)

Prio 3: *StVld = 0 (Suspicious)

Prio 4: *StVld = 1 (Valid)
ACA Lateral Control
Depending on whether ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), "ACA LatCtl Service" or "ACA HndFre Service" shall be used for "ACA Lateral Control".

ACA LatCtl Service uses the generic LatCtl Service Bridge.

ACA HndFre Service uses a specific HndFre Service Bridge, which is described in chapter "ACA HndFre Service". HndFre Service Bridge is similar to LatCtl Service Bridge.

Depending on whether ACA HF is coded and enabled, the specific output signals of ACA LatCtl shall be defined by LatCtl Service or HndFre Service.
ACA LatCtl Service
"ACA LatCtl Service" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false).

If "ACA HndFre Service" shall be used, this chapter shall be skipped.
Replace generic input signals by specific input signal values, signal classifiers and parameters

Inputs

Signal-Values:

CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv 

CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd 

CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq

CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv 

CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd 

CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd

Parameters 

CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet

CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv

CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff
Replace generic input signals by specific input signal values, signal classifiers and parameters 

Inputs

Signal-Values:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACALatCtl_SwSti = true

THEN:

CustFctIn_LatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti 

CustFctIn_LatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti 

CustFctIn_LatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti

CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti

ELSE:

CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv 

CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd 

CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq

CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACALatCtl_SwSti = true

THEN:

CustFctIn_LatCtl_StAcv_sc = 0 

CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = 0 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = 0 

CustFctIn_LatCtlCrvtCtl_FacSsty_sc = 0 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = 0

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0

ELSE:

CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv 

CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd 

CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd 

CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty 

CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq

CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 

CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0

CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd

Parameters 

CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet

CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv

CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff
RangeCheck: Check if input signal range is valid

There is no RangeCheck for ACA LatCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)
ACA HndFre Service
"ACA HndFre Service" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true).

Therefore the specific Service Bridge "HndFre Service Bridge" shall be applied.

If "ACA LatCtl Service" shall be used, this chapter shall be skipped.
Replace generic input signals by specific input signal values, signal classifiers and parameters

Inputs

Signal-Values:

CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq

CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd

Parameters 

CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet

CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv

CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff
Replace generic input signals by specific input signal values, signal classifiers and parameters 

Inputs

Signal-Values:

CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq

CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc

Parameters 

CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet

CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv

CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff
Replace generic input signals by specific input signal values, signal classifiers and parameters 

Inputs

Signal-Values:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACALatCtl_SwSti = true

THEN:

CustFctIn_HndFreLatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1 = VMMP_CFBACA_p_ACALatCtl_StHndDet1Sti

CustFctIn_HndFre_StHndDet2 = VMMP_CFBACA_p_ACALatCtl_StHndDet2Sti

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti

ELSE:

CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1

CustFctIn_HndFre_StHndDet2 = ACA_s_HndFre_StHndDet2

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

(Note: Input signals can be overwritten with stimulation parameters)

IF:

VMMP_CFBACA_p_ACALatCtl_SwSti = true

THEN:

CustFctIn_HndFreLatCtl_StAcv_sc = 0 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = 0 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = 0 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = 0 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = 0

CustFctIn_HndFre_StHndDet1_sc = 0

CustFctIn_HndFre_StHndDet2_sc = 0

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = 0

ELSE:

CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq

CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1

CustFctIn_HndFre_StHndDet2_sc = ACA_sc_HndFre_StHndDet2

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc

Parameters 

CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet

CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv

CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff
RangeCheck: Check if input signal range is valid

There is no RangeCheck for ACA HndFre-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)
HndFre Service Bridge
The HndFre Service Bridge is similar to the LatCtl Service Bridge.

HndFre Service Bridge has two more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld .

The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter "HndFre Specific Pre Conditions".

If "ACA LatCtl Service" shall be used, this chapter shall be skipped.
The HndFre Service Bridge is similar to the LatCtl Service Bridge.

HndFre Service Bridge has three more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc, CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld .

The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter "HndFre Specific Pre Conditions".

If "ACA LatCtl Service" shall be used, this chapter shall be skipped.
Inputs 

Signal-Values:

CustFctIn_HndFreLatCtl_StAcv

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_HndFreLatCtl_StAcv_sc

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_HndFre_StHndDet1_sc

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc

Parameters 

CustFctIn_HndFreLatCtl_FlgIniExcDet

CustFctIn_HndFreLatCtl_FlgErrQlfAcv

CustFctIn_HndFreLatCtl_TurnOff
Inputs

Signal-Values:

CustFctIn_HndFreLatCtl_StAcv

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_HndFreLatCtl_StAcv_sc

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_HndFre_StHndDet1_sc

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc

Parameters 

CustFctIn_HndFreLatCtl_FlgIniExcDet

CustFctIn_HndFreLatCtl_FlgErrQlfAcv

CustFctIn_HndFreLatCtl_TurnOff
Inputs

Signal-Values:

CustFctIn_HndFreLatCtl_StAcv

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq

CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp

CustFctIn_HndFre_StHndDet1

CustFctIn_HndFre_StHndDet2

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd 

Signal-Classifier:

CustFctIn_HndFreLatCtl_StAcv_sc

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_HndFre_StHndDet1_sc

CustFctIn_HndFre_StHndDet2_sc

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc

Parameters 

CustFctIn_HndFreLatCtl_FlgIniExcDet

CustFctIn_HndFreLatCtl_FlgErrQlfAcv

CustFctIn_HndFreLatCtl_TurnOff
Outputs

StAcv

CustFctOut_HndFreLatCtl_StAcv

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp

CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv

CustFctOut_HndFre_StHndDet1

All other Outputs

CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd

CustFctOut_HndFreLatCtlCrvtCtl_FacSsty

CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq

CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd

CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd

CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd

States

CustFctOut_HndFre_StDiagEve

CustFctOut_HndFre_StDiagEve_for_StVld
Outputs

StAcv

CustFctOut_HndFreLatCtl_StAcv

CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp

CustFctOut_HndFre_StHndDet1

All other Outputs

CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd

CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd

CustFctOut_HndFreLatCtlCrvtCtl_FacSsty

CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq

CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd

States

CustFctOut_HndFre_StDiagEve

CustFctOut_HndFre_StDiagEve_for_StVld
Merged classifier of LatCtl and HndFre input signal classifiers

(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_HndFreLatCtl_StAcv_sc

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc 

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc

CustFctIn_HndFre_StHndDet1_sc

THEN:

the corresponding Bits of the merged classifier (internal) shall be true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) shall be false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)
Merged classifier of LatCtl and HndFre input signal classifiers

(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_HndFreLatCtl_StAcv_sc

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc

CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc 

CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc 

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc

CustFctIn_HndFre_StHndDet1_sc

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc

THEN:

the corresponding Bits of the merged classifier (internal) shall be true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) shall be false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)
Merged classifier of LatCtl and HndFre input signal classifiers

(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_HndFreLatCtl_StAcv_sc

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc 

CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc 

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc

CustFctIn_HndFre_StHndDet1_sc

CustFctIn_HndFre_StHndDet2_sc

CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc

VMMP_CFBACA_p_ACASVLatCtlErrRact_TrigClas

THEN:

the corresponding Bits of the merged classifier (internal) shall be true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) shall be false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)
Calculation of output signal CustFctOut_HndFre_StHndDet1

IF [AND(1,2,3)]: 

1) CustFctIn_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

2) CustFctIn_HndFre_StHndDet2 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn

3) VSOCH_s_FlgACAHF_Ena is true

THEN: 

CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff

ELSE: 

CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn
Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv

IF: 

CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

THEN: 

CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq

ELSEIF [AND(1,2)]: 

1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

2) Bit1 of BitwiseOR (

CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc 

CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc

CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) 

is set 

THEN: 

CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq

ELSE: 

CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

Row	ID	Type	Status	Relevant	Candidate	Reason	Normalized text
102	16660647	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Inputs Signal-Values: CustFctIn_LatCtl_StAcv CustFctIn_LatCtlCrvtCtl_CrvtDmd CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd CustFctIn Inputs Signal-Values: CustFctIn_LatCtl_StAcv CustFctIn_LatCtlCrvtCtl_CrvtDmd CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd CustFctIn_LatCtlCrvtCtl_FacSsty CustFctIn_LatCtlCrvtCtl_StLimCtlFReq CustFctIn_CrvtCtl_CrvtDmdTiStamp CustFctIn_LatCtlSlipAgCtl_AgDmd CustFctIn_LatCtlSlipAgCtl_AgGrdDmd CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_LatCtl_StAcv_sc CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_LatCtlCrvtCtl_FacSsty_sc CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_LatCtlSlipAgCtl_AgDmd_sc CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc Parameters CustFctIn_LatCtl_FlgIniExcDet CustFctIn_LatCtl_FlgErrQlfAcv CustFctIn_LatCtl_TurnOff Raw { "ID": "16660647", "ASIL": " QM", "Text": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LatCtl_StAcv_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LatCtl_FlgIniExcDet\n_x000D_CustFctIn_LatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LatCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337915", "Description": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LatCtl_StAcv_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LatCtl_FlgIniExcDet\n_x000D_CustFctIn_LatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LatCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
103	16660648	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Outputs StAcv CustFctOut_LatCtl_StAcv CustFctOut_LatCtlCrvtCtl_FlgGrdExtp CustFctOut_LatCtlSlipAgCtl_FlgAcv All other Outputs Outputs StAcv CustFctOut_LatCtl_StAcv CustFctOut_LatCtlCrvtCtl_FlgGrdExtp CustFctOut_LatCtlSlipAgCtl_FlgAcv All other Outputs CustFctOut_LatCtlCrvtCtl_CrvtDmd CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd CustFctOut_LatCtlCrvtCtl_FacSsty CustFctOut_LatCtlCrvtCtl_StLimCtlFReq CustFctOut_LatCtlSlipAgCtl_AgDmd CustFctOut_LatCtlSlipAgCtl_AgGrdDmd CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd States CustFctOut_LatCtl_StDiagEve Raw { "ID": "16660648", "ASIL": " QM", "Text": "Outputs\n_x000D_StAcv\n_x000D_CustFctOut_LatCtl_StAcv\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv\n_x000D_ \n_x000D_All other Outputs\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctOut_LatCtlSlipAgCtl_AgDmd\n_x000D_CustFctOut_LatCtlSlipAgCtl_AgGrdDmd\n_x000D_CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CustFctOut_LatCtl_StDiagEve", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337917", "Description": "Outputs\n_x000D_StAcv\n_x000D_CustFctOut_LatCtl_StAcv\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv\n_x000D_ \n_x000D_All other Outputs\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtDmd\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CustFctOut_LatCtlCrvtCtl_FacSsty\n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctOut_LatCtlSlipAgCtl_AgDmd\n_x000D_CustFctOut_LatCtlSlipAgCtl_AgGrdDmd\n_x000D_CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CustFctOut_LatCtl_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
104	16660649	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Merged classifier of LatCtl input signal classifiers (Note: The classifier information of all LatCtl input signals are merged to Merged classifier of LatCtl input signal classifiers (Note: The classifier information of all LatCtl input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation) IF BitwiseOR: one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) CustFctIn_LatCtl_StAcv_sc CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_LatCtlCrvtCtl_FacSsty_sc CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_LatCtlSlipAgCtl_AgDmd_sc CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc THEN: the corresponding Bits of the merged classifier (internal) are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) ELSE: the corresponding Bits of the merged classifier (internal) are false (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) Raw { "ID": "16660649", "ASIL": " ASIL B", "Text": "Merged classifier of LatCtl input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_LatCtl_StAcv_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) are true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) are false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337913", "Description": "Merged classifier of LatCtl input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_LatCtl_StAcv_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) are true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) are false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
105	16660650	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv IF: CustFctIn_LatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_ Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv IF: CustFctIn_LatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv THEN: CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq ELSEIF [AND(1,2)]: 1) CustFctIn_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv 2) Bit1 of BitwiseOR ( CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_LatCtlCrvtCtl_FacSsty_sc CustFctIn_LatCtlSlipAgCtl_AgDmd_sc) is set THEN: CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq ELSE: CustFctOut_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv Raw { "ID": "16660650", "ASIL": " ASIL B", "Text": "Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctIn_LatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]: \n_x000D_1) CustFctIn_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_2) Bit1 of BitwiseOR (\n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc\n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc) \n_x000D_is set \n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CustFctOut_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337921", "Description": "Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctIn_LatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]: \n_x000D_1) CustFctIn_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_2) Bit1 of BitwiseOR (\n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc\n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc) \n_x000D_is set \n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CustFctOut_LatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
106	16660651	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq IF: CustFctIn_LatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLi Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq IF: CustFctIn_LatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi THEN: CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq ELSE: CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq Raw { "ID": "16660651", "ASIL": " ASIL B", "Text": "Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq \n_x000D_ \n_x000D_IF: \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi \n_x000D_THEN: \n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ELSE:\n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337918", "Description": "Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq \n_x000D_ \n_x000D_IF: \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq > VMMP_SINFCT_c_SrvLatCtlCrvtCtl_StLimCtlFReqRngLimHi \n_x000D_THEN: \n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ELSE:\n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq is equal to CustFctIn_LatCtlCrvtCtl_StLimCtlFReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
107	16660652	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp IF: CustFctIn_CrvtCtl_CrvtDmdTiStamp of the previous computati Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp IF: CustFctIn_CrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle THEN: CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 1 (true) ELSE: CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) Raw { "ID": "16660652", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle\n_x000D_THEN:\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 1 (true)\n_x000D_ELSE:\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337919", "Description": "Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp of the previous computation cycle is equal to the current computational cycle\n_x000D_THEN:\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 1 (true)\n_x000D_ELSE:\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
108	16660653	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv IF: Bit1 of BitwiseOR ( CustFctIn_LatCtlSlipAgCtl_AgDmd_sc Cu Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv IF: Bit1 of BitwiseOR ( CustFctIn_LatCtlSlipAgCtl_AgDmd_sc CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc) is set THEN: CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) ELSE: CustFctOut_LatCtlSlipAgCtl_FlgAcv = 1 (true) Raw { "ID": "16660653", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_Bit1 of BitwiseOR (\n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc)\n_x000D_is set\n_x000D_THEN:\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_ELSE:\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 1 (true)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337906", "Description": "Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv \n_x000D_ \n_x000D_\n_x000D_IF:\n_x000D_Bit1 of BitwiseOR (\n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc)\n_x000D_is set\n_x000D_THEN:\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_ELSE:\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 1 (true)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
109	16660654	Pre Condition	Released	no	False	type_not_target, relevance_filtered	LatCtl Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_LatCtl_Tur LatCtl Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_LatCtl_TurnOff FlgIniExcDet equal to CustFctIn_LatCtl_FlgIniExcDet FlgErrQlfAcv equal to CustFctIn_LatCtl_FlgErrQlfAcv merged classifier RangeCheck Output: CustFctOut_LatCtl_StDiagEve equal to StDiagEve Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_). Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way: specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information (This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions) Raw { "ID": "16660654", "ASIL": " ASIL B", "Text": "LatCtl Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_LatCtl_TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_LatCtl_FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_LatCtl_FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_LatCtl_StDiagEve equal to StDiagEve\n_x000D_ \n_x000D_ \n_x000D_Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_).\n_x000D_Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n_x000D_specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n_x000D_ \n_x000D_(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337904", "Description": "LatCtl Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_LatCtl_TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_LatCtl_FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_LatCtl_FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_LatCtl_StDiagEve equal to StDiagEve\n_x000D_ \n_x000D_ \n_x000D_Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_).\n_x000D_Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n_x000D_specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n_x000D_ \n_x000D_(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
110	16660655	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirement describes the valid case of the LatCtl Service Bridge. Note: The following functional requi The following functional requirement describes the valid case of the LatCtl Service Bridge. Note: The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time. Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) * Disable Case: * NotVld Case: * Fail Case: * Init Case: * Susp Case: For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful. Raw { "ID": "16660655", "ASIL": " ", "Text": "The following functional requirement describes the valid case of the LatCtl Service Bridge.\n_x000D_ \n_x000D_Note:\n_x000D_The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n_x000D_ Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Disable Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ NotVld Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Fail Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Init Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Susp Case:\n_x000D_For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337890", "Description": "The following functional requirement describes the valid case of the LatCtl Service Bridge.\n_x000D_ \n_x000D_Note:\n_x000D_The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n_x000D_ Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Disable Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ NotVld Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Fail Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Init Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Susp Case:\n_x000D_For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
111	16660656	Functional	Released	yes	True		Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF: CustFctOut_LatCtl_StDiag Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNone THEN: CustFctOut_LatCtl_StAcv = CustFctIn_LatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv) CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = CustFctIn_CrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp) CustFctOut_LatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv CustFctOut_LatCtlCrvtCtl_CrvtDmd = CustFctIn_LatCtlCrvtCtl_CrvtDmd CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd CustFctOut_LatCtlCrvtCtl_FacSsty = CustFctIn_LatCtlCrvtCtl_FacSsty CustFctOut_LatCtlCrvtCtl_StLimCtlFReq = CustFctIn_LatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq) CustFctOut_LatCtlSlipAgCtl_AgDmd = CustFctIn_LatCtlSlipAgCtl_AgDmd CustFctOut_LatCtlSlipAgCtl_AgGrdDmd = CustFctIn_LatCtlSlipAgCtl_AgGrdDmd CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd Raw { "ID": "16660656", "ASIL": " ASIL B", "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = CustFctIn_LatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv)\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = CustFctIn_CrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp)\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtDmd = CustFctIn_LatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctOut_LatCtlCrvtCtl_FacSsty = CustFctIn_LatCtlCrvtCtl_FacSsty \n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq = CustFctIn_LatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq) \n_x000D_CustFctOut_LatCtlSlipAgCtl_AgDmd = CustFctIn_LatCtlSlipAgCtl_AgDmd \n_x000D_CustFctOut_LatCtlSlipAgCtl_AgGrdDmd = CustFctIn_LatCtlSlipAgCtl_AgGrdDmd \n_x000D_CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337907", "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = CustFctIn_LatCtl_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LatCtl_StAcv)\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = CustFctIn_CrvtCtl_CrvtDmdTiStamp (considering Calculation of output signal CustFctOut_LatCtlCrvtCtl_FlgGrdExtp)\n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv is calculated by Calculation of output signal CustFctOut_LatCtlSlipAgCtl_FlgAcv\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtDmd = CustFctIn_LatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctOut_LatCtlCrvtCtl_FacSsty = CustFctIn_LatCtlCrvtCtl_FacSsty \n_x000D_CustFctOut_LatCtlCrvtCtl_StLimCtlFReq = CustFctIn_LatCtlCrvtCtl_StLimCtlFReq (considering Mapping of CustFctIn_LatCtlCrvtCtl_StLimCtlFReq) \n_x000D_CustFctOut_LatCtlSlipAgCtl_AgDmd = CustFctIn_LatCtlSlipAgCtl_AgDmd \n_x000D_CustFctOut_LatCtlSlipAgCtl_AgGrdDmd = CustFctIn_LatCtlSlipAgCtl_AgGrdDmd \n_x000D_CustFctOut_LatCtlStgStiCtl_AgOffStgWhlDmd = CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
112	16660657	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. CustFctOut_LatCtl_StAcv, CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value. * All other Outputs will be frozen to the last valid value. Raw { "ID": "16660657", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_LatCtl_StAcv, CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Type": "Information", "Status": "", "Summary": "Note for different cases of errors", "Relevant": "no", "column_12": "", "Foreign ID": "1337905", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_LatCtl_StAcv, CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
113	23568523	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. CustFctOut_LatCtl_StAcv and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value. * CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd are set to a defined value. * All other Outputs will be frozen to the last valid value. Raw { "ID": "23568523", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_LatCtl_StAcv and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Type": "Information", "Status": "", "Summary": "Note for different cases of errors", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.\n_x000D_ CustFctOut_LatCtl_StAcv and CustFctOut_LatCtlSlipAgCtl_FlgAcv are set to a defined value or frozen to the last valid value.\n_x000D_* CustFctOut_LatCtlCrvtCtl_FlgGrdExtp and CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd are set to a defined value.\n_x000D_* All other Outputs will be frozen to the last valid value.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
114	16660658	Functional	Released	yes	True		Disable Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq Disable Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660658", "ASIL": " ASIL B", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_ \n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Disable Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1337908", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_ \n_x000D_ \n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
115	23568534	Functional	Released	yes	True		Disable Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq Disable Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23568534", "ASIL": " ASIL B", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Disable Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
116	16660659	Functional	Released	yes	True		NotVld Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoR NotVld Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660659", "ASIL": " ASIL B", "Text": "NotVld Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "NotVld Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1337911", "Description": "NotVld Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
117	23568536	Functional	Released	yes	True		NotVld Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoR NotVld Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23568536", "ASIL": " ASIL B", "Text": "NotVld Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "NotVld Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "NotVld Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
118	16660660	Functional	Released	yes	True		Fail Case: IF: CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq Cu Fail Case: IF: CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660660", "ASIL": " ASIL B", "Text": "Fail Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Fail Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1337893", "Description": "Fail Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
119	23568539	Functional	Released	yes	True		Fail Case: IF: CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq Cu Fail Case: IF: CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23568539", "ASIL": " ASIL B", "Text": "Fail Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Fail Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Fail Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_DiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
120	16660661	Functional	Released	yes	True		Init Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq Init Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660661", "ASIL": " ASIL B", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Init Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1337895", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
121	23568541	Functional	Released	yes	True		Init Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq Init Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23568541", "ASIL": " ASIL B", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Init Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv = VMMP_c_StReqCusFctNoReq\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv = 0 (false)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
122	16660662	Functional	Released	yes	True		Susp Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_LatCtl_StAcv shall be equal to the value Susp Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value) CustFctOut_LatCtlCrvtCtl_FlgGrdExtp shall be equal to the value of previous computation cycle (Hold Last Value) CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660662", "ASIL": " ASIL B", "Text": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp shall be equal to the value of previous computation cycle (Hold Last Value) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Susp Case", "Relevant": "yes", "column_12": "", "Foreign ID": "1337910", "Description": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp shall be equal to the value of previous computation cycle (Hold Last Value) \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
123	23568543	Functional	Released	yes	True		Susp Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_LatCtl_StAcv shall be equal to the value Susp Case: IF: CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value) CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false) CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value) All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "23568543", "ASIL": " ASIL B", "Text": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "Susp Case", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_LatCtl_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_LatCtl_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_CustFctOut_LatCtlCrvtCtl_FlgGrdExtp = 0 (false)\n_x000D_CustFctOut_LatCtlCrvtCtl_CrvtGrdDmd = 0 \n_x000D_CustFctOut_LatCtlSlipAgCtl_FlgAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n_x000D_All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
124	16660663	Folder		no	False	type_not_target, status_filtered, relevance_filtered	WarnBrk Service Bridge WarnBrk Service Bridge Raw { "ID": "16660663", "ASIL": " ", "Text": "WarnBrk Service Bridge", "Type": "Folder", "Status": "", "Summary": "WarnBrk Service Bridge", "Relevant": "no", "column_12": "", "Foreign ID": "1337878", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
125	16660664	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Inputs Signal-Values: CustFctIn_WarnBrk_ItReq Signal-Classifier: CustFctIn_WarnBrk_ItReq_sc Parameters CustFctIn_WarnBrk_ Inputs Signal-Values: CustFctIn_WarnBrk_ItReq Signal-Classifier: CustFctIn_WarnBrk_ItReq_sc Parameters CustFctIn_WarnBrk_FlgIniExcDet CustFctIn_WarnBrk_FlgErrQlfAcv CustFctIn_WarnBrk_TurnOff Raw { "ID": "16660664", "ASIL": " QM", "Text": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_WarnBrk_ItReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_WarnBrk_ItReq_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_WarnBrk_FlgIniExcDet\n_x000D_CustFctIn_WarnBrk_FlgErrQlfAcv\n_x000D_CustFctIn_WarnBrk_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337892", "Description": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_WarnBrk_ItReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_WarnBrk_ItReq_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_WarnBrk_FlgIniExcDet\n_x000D_CustFctIn_WarnBrk_FlgErrQlfAcv\n_x000D_CustFctIn_WarnBrk_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
126	16660665	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Outputs Request CustFctOut_WarnBrk_ItReq States CustFctOut_WarnBrk_StDiagEve Outputs Request CustFctOut_WarnBrk_ItReq States CustFctOut_WarnBrk_StDiagEve Raw { "ID": "16660665", "ASIL": " QM", "Text": "Outputs\n_x000D_Request\n_x000D_CustFctOut_WarnBrk_ItReq\n_x000D_States\n_x000D_CustFctOut_WarnBrk_StDiagEve", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337894", "Description": "Outputs\n_x000D_Request\n_x000D_CustFctOut_WarnBrk_ItReq\n_x000D_States\n_x000D_CustFctOut_WarnBrk_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
127	16660666	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Merged classifier of WarnBrk input signal classifiers (Note: The classifier information of all WarnBrk input signals are merged t Merged classifier of WarnBrk input signal classifiers (Note: The classifier information of all WarnBrk input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation) IF BitwiseOR: one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) CustFctIn_WarnBrk_ItReq_sc THEN: the corresponding Bits of the merged classifier (internal) are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) ELSE: the corresponding Bits of the merged classifier (internal) are false (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) Raw { "ID": "16660666", "ASIL": " ASIL B", "Text": "Merged classifier of WarnBrk input signal classifiers\n_x000D_(Note: The classifier information of all WarnBrk input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_WarnBrk_ItReq_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) are true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) are false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337889", "Description": "Merged classifier of WarnBrk input signal classifiers\n_x000D_(Note: The classifier information of all WarnBrk input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_WarnBrk_ItReq_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) are true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) are false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
128	16660667	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping of CustFctIn_WarnBrk_ItReq IF: CustFctIn_WarnBrk_ItReq > VMMP_SINFCT_c_SrvWarnBrk_ItReqRngLimHi THEN: CustFctOut_W Mapping of CustFctIn_WarnBrk_ItReq IF: CustFctIn_WarnBrk_ItReq > VMMP_SINFCT_c_SrvWarnBrk_ItReqRngLimHi THEN: CustFctOut_WarnBrk_ItReq is equal to VMMP_c_StReqCusFctNoReq ELSE: CustFctOut_WarnBrk_ItReq is equal to CustFctIn_WarnBrk_ItReq Raw { "ID": "16660667", "ASIL": " ASIL B", "Text": "Mapping of CustFctIn_WarnBrk_ItReq \n_x000D_ \n_x000D_IF: \n_x000D_CustFctIn_WarnBrk_ItReq > VMMP_SINFCT_c_SrvWarnBrk_ItReqRngLimHi \n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ELSE:\n_x000D_CustFctOut_WarnBrk_ItReq is equal to CustFctIn_WarnBrk_ItReq", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337901", "Description": "Mapping of CustFctIn_WarnBrk_ItReq \n_x000D_ \n_x000D_IF: \n_x000D_CustFctIn_WarnBrk_ItReq > VMMP_SINFCT_c_SrvWarnBrk_ItReqRngLimHi \n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ELSE:\n_x000D_CustFctOut_WarnBrk_ItReq is equal to CustFctIn_WarnBrk_ItReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
129	16660668	Pre Condition	Released	no	False	type_not_target, relevance_filtered	WarnBrk Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_WarnBrk_T WarnBrk Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_WarnBrk_TurnOff FlgIniExcDet equal to CustFctIn_WarnBrk_FlgIniExcDet FlgErrQlfAcv equal to CustFctIn_WarnBrk_FlgErrQlfAcv merged classifier RangeCheck Output: CustFctOut_WarnBrk_StDiagEve equal to StDiagEve Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_). Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way: specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information (This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions) Raw { "ID": "16660668", "ASIL": " ASIL B", "Text": "WarnBrk Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_WarnBrk_TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_WarnBrk_FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_WarnBrk_FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_WarnBrk_StDiagEve equal to StDiagEve\n_x000D_ \n_x000D_ \n_x000D_Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_).\n_x000D_Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n_x000D_specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n_x000D_ \n_x000D_(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337897", "Description": "WarnBrk Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_WarnBrk_TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_WarnBrk_FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_WarnBrk_FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_WarnBrk_StDiagEve equal to StDiagEve\n_x000D_ \n_x000D_ \n_x000D_Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_).\n_x000D_Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n_x000D_specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n_x000D_ \n_x000D_(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
130	16660669	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirement describes the valid case of the WarnBrk Service Bridge. Note: The following functional requ The following functional requirement describes the valid case of the WarnBrk Service Bridge. Note: The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time. Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) * Disable Case: * NotVld Case: * Fail Case: * Init Case: * Susp Case: For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful. Raw { "ID": "16660669", "ASIL": " ", "Text": "The following functional requirement describes the valid case of the WarnBrk Service Bridge.\n_x000D_ \n_x000D_Note:\n_x000D_The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n_x000D_ Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Disable Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ NotVld Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Fail Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Init Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Susp Case:\n_x000D_For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337899", "Description": "The following functional requirement describes the valid case of the WarnBrk Service Bridge.\n_x000D_ \n_x000D_Note:\n_x000D_The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n_x000D_ Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Disable Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ NotVld Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Fail Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Init Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Susp Case:\n_x000D_For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
131	16660670	Functional	Released	yes	True		Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF: CustFctOut_WarnBrk_StDia Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNone THEN: CustFctOut_WarnBrk_ItReq = CustFctIn_WarnBrk_ItReq (considering Mapping of CustFctIn_WarnBrk_ItReq) Raw { "ID": "16660670", "ASIL": " ASIL B", "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = CustFctIn_WarnBrk_ItReq (considering Mapping of CustFctIn_WarnBrk_ItReq)", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337903", "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = CustFctIn_WarnBrk_ItReq (considering Mapping of CustFctIn_WarnBrk_ItReq)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
132	16660671	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. Raw { "ID": "16660671", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337881", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
133	16660672	Functional	Released	yes	True		Disable Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoRe Disable Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660672", "ASIL": " ASIL B", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337879", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
134	16660673	Functional	Released	yes	True		NotVld Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctN NotVld Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660673", "ASIL": " ASIL B", "Text": "NotVld Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337876", "Description": "NotVld Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
135	16660674	Functional	Released	yes	True		Fail Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq Fail Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660674", "ASIL": " ASIL B", "Text": "Fail Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337888", "Description": "Fail Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
136	16660675	Functional	Released	yes	True		Init Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoRe Init Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660675", "ASIL": " ASIL B", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337884", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
137	16660676	Functional	Released	yes	True		Susp Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_WarnBrk_ItReq shall be equal to the val Susp Case: IF: CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_WarnBrk_ItReq shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660676", "ASIL": " ASIL B", "Text": "Susp Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337883", "Description": "Susp Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_WarnBrk_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_WarnBrk_ItReq shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
138	16660677	Folder		no	False	type_not_target, status_filtered, relevance_filtered	StgWhlVib Service Bridge StgWhlVib Service Bridge Raw { "ID": "16660677", "ASIL": " ", "Text": "StgWhlVib Service Bridge", "Type": "Folder", "Status": "", "Summary": "StgWhlVib Service Bridge", "Relevant": "no", "column_12": "", "Foreign ID": "1337916", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
139	16660678	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Inputs Signal-Values: CustFctIn_StgWhlVib_IdxProfReq Signal-Classifier: CustFctIn_StgWhlVib_IdxProfReq_sc Parameters Cust Inputs Signal-Values: CustFctIn_StgWhlVib_IdxProfReq Signal-Classifier: CustFctIn_StgWhlVib_IdxProfReq_sc Parameters CustFctIn_StgWhlVib_FlgIniExcDet CustFctIn_StgWhlVib_FlgErrQlfAcv CustFctIn_StgWhlVib_TurnOff Raw { "ID": "16660678", "ASIL": " QM", "Text": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_StgWhlVib_FlgIniExcDet\n_x000D_CustFctIn_StgWhlVib_FlgErrQlfAcv\n_x000D_CustFctIn_StgWhlVib_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337912", "Description": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_StgWhlVib_IdxProfReq_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_StgWhlVib_FlgIniExcDet\n_x000D_CustFctIn_StgWhlVib_FlgErrQlfAcv\n_x000D_CustFctIn_StgWhlVib_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
140	16660679	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Outputs Request CustFctOut_StgWhlVib_IdxProfReq States CustFctOut_StgWhlVib_StDiagEve Outputs Request CustFctOut_StgWhlVib_IdxProfReq States CustFctOut_StgWhlVib_StDiagEve Raw { "ID": "16660679", "ASIL": " QM", "Text": "Outputs\n_x000D_Request\n_x000D_CustFctOut_StgWhlVib_IdxProfReq\n_x000D_States\n_x000D_CustFctOut_StgWhlVib_StDiagEve", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337914", "Description": "Outputs\n_x000D_Request\n_x000D_CustFctOut_StgWhlVib_IdxProfReq\n_x000D_States\n_x000D_CustFctOut_StgWhlVib_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
141	16660680	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Merged classifier of StgWhlVib input signal classifiers (Note: The classifier information of all StgWhlVib input signals are merg Merged classifier of StgWhlVib input signal classifiers (Note: The classifier information of all StgWhlVib input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation) IF BitwiseOR: one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) CustFctIn_StgWhlVib_IdxProfReq_sc THEN: the corresponding Bits of the merged classifier (internal) are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) ELSE: the corresponding Bits of the merged classifier (internal) are false (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) Raw { "ID": "16660680", "ASIL": " QM", "Text": "Merged classifier of StgWhlVib input signal classifiers\n_x000D_(Note: The classifier information of all StgWhlVib input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_StgWhlVib_IdxProfReq_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) are true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) are false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337920", "Description": "Merged classifier of StgWhlVib input signal classifiers\n_x000D_(Note: The classifier information of all StgWhlVib input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_StgWhlVib_IdxProfReq_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) are true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) are false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
142	16660681	Pre Condition	Released	no	False	type_not_target, relevance_filtered	StgWhlVib Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_StgWhlV StgWhlVib Service Bridge shall use Signalmonitoring with following signal assignment: Input: TurnOff equal to CustFctIn_StgWhlVib _TurnOff FlgIniExcDet equal to CustFctIn_StgWhlVib _FlgIniExcDet FlgErrQlfAcv equal to CustFctIn_StgWhlVib _FlgErrQlfAcv merged classifier RangeCheck Output: CustFctOut_StgWhlVib _StDiagEve equal to StDiagEve Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_). Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way: specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information (This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions) Raw { "ID": "16660681", "ASIL": " QM", "Text": "StgWhlVib Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_StgWhlVib _TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_StgWhlVib _FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_StgWhlVib _FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_StgWhlVib _StDiagEve equal to StDiagEve\n_x000D_ \n_x000D_ \n_x000D_Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_).\n_x000D_Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n_x000D_specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n_x000D_ \n_x000D_(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337900", "Description": "StgWhlVib Service Bridge shall use Signalmonitoring with following signal assignment:\n_x000D_ \n_x000D_Input:\n_x000D_TurnOff equal to CustFctIn_StgWhlVib _TurnOff\n_x000D_FlgIniExcDet equal to CustFctIn_StgWhlVib _FlgIniExcDet\n_x000D_FlgErrQlfAcv equal to CustFctIn_StgWhlVib _FlgErrQlfAcv\n_x000D_merged classifier\n_x000D_RangeCheck\n_x000D_ \n_x000D_Output:\n_x000D_CustFctOut_StgWhlVib _StDiagEve equal to StDiagEve\n_x000D_ \n_x000D_ \n_x000D_Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_).\n_x000D_Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n_x000D_specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n_x000D_ \n_x000D_(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
143	16660682	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirement describes the valid case of the StgWhlVib Service Bridge. Note: The following functional re The following functional requirement describes the valid case of the StgWhlVib Service Bridge. Note: The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time. Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) * Disable Case: * NotVld Case: * Fail Case: * Init Case: * Susp Case: For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful. Raw { "ID": "16660682", "ASIL": " ", "Text": "The following functional requirement describes the valid case of the StgWhlVib Service Bridge.\n_x000D_ \n_x000D_Note:\n_x000D_The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n_x000D_ Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Disable Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ NotVld Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Fail Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Init Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Susp Case:\n_x000D_For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337902", "Description": "The following functional requirement describes the valid case of the StgWhlVib Service Bridge.\n_x000D_ \n_x000D_Note:\n_x000D_The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n_x000D_ Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Disable Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ NotVld Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Fail Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Init Case:\n_x000D_* \n_x000D_ \n_x000D_ \n_x000D_ Susp Case:\n_x000D_For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
144	16660683	Functional	Released	yes	True		Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF: CustFctOut_StgWhlVib_StD Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions) IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNone THEN: CustFctOut_StgWhlVib_IdxProfReq = CustFctIn_StgWhlVib_IdxProfReq Raw { "ID": "16660683", "ASIL": " QM", "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = CustFctIn_StgWhlVib_IdxProfReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337891", "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = CustFctIn_StgWhlVib_IdxProfReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
145	16660684	Information		no	False	type_not_target, status_filtered, relevance_filtered	The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitorin The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour. Raw { "ID": "16660684", "ASIL": " ", "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (StDiagEve) determines the output signal behaviour.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337896", "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
146	16660685	Functional	Released	yes	True		Disable Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqC Disable Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigDi THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660685", "ASIL": " QM", "Text": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337882", "Description": "Disable Case:\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
147	16660686	Functional	Released	yes	True		NotVld Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StR NotVld Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNotVld THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660686", "ASIL": " QM", "Text": "NotVld Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337880", "Description": "NotVld Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
148	16660687	Functional	Released	yes	True		Fail Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCu Fail Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigFail THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660687", "ASIL": " QM", "Text": "Fail Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337877", "Description": "Fail Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
149	16660688	Functional	Released	yes	True		Init Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqC Init Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigIni THEN: CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq Raw { "ID": "16660688", "ASIL": " QM", "Text": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337886", "Description": "Init\n_x000D_ Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq = VMMP_c_StReqCusFctNoReq", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
150	16660689	Functional	Released	yes	True		Susp Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_StgWhlVib_IdxProfReq shall be equal t Susp Case: IF: CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigSusp THEN: CustFctOut_StgWhlVib_IdxProfReq shall be equal to the value of previous computation cycle (Hold Last Value) Raw { "ID": "16660689", "ASIL": " QM", "Text": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq shall be equal to the value of previous computation cycle (Hold Last Value)", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337898", "Description": "Susp Case:\n_x000D_ \n_x000D_IF: \n_x000D_CustFctOut_StgWhlVib_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN: \n_x000D_CustFctOut_StgWhlVib_IdxProfReq shall be equal to the value of previous computation cycle (Hold Last Value)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
151	16660690	Folder		no	False	type_not_target, status_filtered, relevance_filtered	Specific Conditions and Requirements Specific Conditions and Requirements Raw { "ID": "16660690", "ASIL": " ", "Text": "Specific Conditions and Requirements", "Type": "Folder", "Status": "", "Summary": "Specific Conditions and Requirements", "Relevant": "no", "column_12": "", "Foreign ID": "1337922", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
152	16660691	Information		no	False	type_not_target, status_filtered, relevance_filtered	The module output values in the initial timestep are not equal to the defined Init Values in the signal specification file. It is The module output values in the initial timestep are not equal to the defined Init Values in the signal specification file. It is not necessary to check the output values of the modul within the initial timestep. Raw { "ID": "16660691", "ASIL": " ", "Text": "The module output values in the initial timestep are not equal to the defined Init Values in the signal specification file.\n_x000D_ \n_x000D_It is not necessary to check the output values of the modul within the initial timestep.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1341254", "Description": "The module output values in the initial timestep are not equal to the defined Init Values in the signal specification file.\n_x000D_ \n_x000D_It is not necessary to check the output values of the modul within the initial timestep.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
153	16660692	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA LgtLimA Service ACA LgtLimA Service Raw { "ID": "16660692", "ASIL": " ", "Text": "ACA LgtLimA Service", "Type": "Folder", "Status": "", "Summary": "ACA LgtLimA Service", "Relevant": "no", "column_12": "", "Foreign ID": "1359923", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
154	16660693	Information		no	False	type_not_target, status_filtered, relevance_filtered	In Cluster 1 to 4 (K-Matrix 12.06.00) ACA LgtLimA Service uses the BUS signals of CAA LgtLimA Service. The usage of CAA signals i In Cluster 1 to 4 (K-Matrix 12.06.00) ACA LgtLimA Service uses the BUS signals of CAA LgtLimA Service. The usage of CAA signals is not a mistake. Since Cluster 5 (K-Matrix 12.07.00) ACA LgtLimA signal set exists. Raw { "ID": "16660693", "ASIL": " ", "Text": "In Cluster 1 to 4 (K-Matrix 12.06.00) ACA LgtLimA Service uses the BUS signals of CAA LgtLimA Service.\n_x000D_The usage of CAA signals is not a mistake.\n_x000D_Since Cluster 5 (K-Matrix 12.07.00) ACA LgtLimA signal set exists.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387704", "Description": "In Cluster 1 to 4 (K-Matrix 12.06.00) ACA LgtLimA Service uses the BUS signals of CAA LgtLimA Service.\n_x000D_The usage of CAA signals is not a mistake.\n_x000D_Since Cluster 5 (K-Matrix 12.07.00) ACA LgtLimA signal set exists.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
155	16660694	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctI Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_LgtLimA_StAcv = CAA_s_LgtLimA_StAcv CustFctIn_LgtLimA_ADmd = CAA_s_LgtLimA_ADmd CustFctIn_LgtLimA_APredTar = CAA_s_LgtLimA_ADmd CustFctIn_LgtLimA_AGrdMaxDec = 0 CustFctIn_LgtLimA _AGrdMaxInc = 0 CustFctIn_LgtLimA _ATlrHiTar = CAA_s_LgtLimA_ADmd CustFctIn_LgtLimA_ATlrHiDyn = CAA_s_LgtLimA_ADmd CustFctIn_LgtLimA_MdTarDyn = 0 Signal-Classifier: CustFctIn_LgtLimA_StAcv_sc = CAA_sc_LgtLimA_StAcv CustFctIn_LgtLimA_ADmd_sc = CAA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_APredTar_sc = CAA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 CustFctIn_LgtLimA _ATlrHiTar_sc = CAA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_ATlrHiDyn_sc = CAA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_MdTarDyn_sc = 0 Parameters CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff Raw { "ID": "16660694", "ASIL": " QM", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LgtLimA_StAcv = CAA_s_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = 0 \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = 0 \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0 \n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = CAA_sc_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf\n_x000D_CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet\n_x000D_CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv\n_x000D_CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1359922", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LgtLimA_StAcv = CAA_s_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = 0 \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = 0 \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = CAA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0 \n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = CAA_sc_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = CAA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf\n_x000D_CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet\n_x000D_CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv\n_x000D_CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
156	18404670	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFct Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_MdTarDyn = 0 Signal-Classifier: CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_MdTarDyn_sc = 0 Parameters CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff Raw { "ID": "18404670", "ASIL": " QM", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0 \n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf\n_x000D_CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet\n_x000D_CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv\n_x000D_CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0 \n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf\n_x000D_CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet\n_x000D_CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv\n_x000D_CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
157	59828980	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACALgtLimA_SwSti = true THEN: CustFctIn_LgtLimA_StAcv = VMMP_CFBACA_p_ACALgtLimA_StAcvSti CustFctIn_LgtLimA_ADmd = VMMP_CFBACA_p_ACALgtLimA_ADmdSti CustFctIn_LgtLimA_APredTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti CustFctIn_LgtLimA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxDecSti CustFctIn_LgtLimA _AGrdMaxInc = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxIncSti CustFctIn_LgtLimA _ATlrHiTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti CustFctIn_LgtLimA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtLimA_ADmdSti CustFctIn_LgtLimA_MdTarDyn = 0 ELSE: CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd CustFctIn_LgtLimA_MdTarDyn = 0 Signal-Classifier: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACALgtLimA_SwSti = true THEN: CustFctIn_LgtLimA_StAcv_sc = 0 CustFctIn_LgtLimA_ADmd_sc = 0 CustFctIn_LgtLimA_APredTar_sc = 0 CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 CustFctIn_LgtLimA _ATlrHiTar_sc = 0 CustFctIn_LgtLimA_ATlrHiDyn_sc = 0 CustFctIn_LgtLimA_MdTarDyn_sc = 0 ELSE: CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd CustFctIn_LgtLimA_MdTarDyn_sc = 0 Parameters CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff Raw { "ID": "59828980", "ASIL": " QM", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALgtLimA_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LgtLimA_StAcv = VMMP_CFBACA_p_ACALgtLimA_StAcvSti \n_x000D_CustFctIn_LgtLimA_ADmd = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_APredTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxDecSti \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxIncSti \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0\n_x000D_ELSE:\n_x000D_CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0 \n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALgtLimA_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = 0 \n_x000D_CustFctIn_LgtLimA_ADmd_sc = 0 \n_x000D_CustFctIn_LgtLimA_APredTar_sc = 0 \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = 0 \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = 0 \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf\n_x000D_CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet\n_x000D_CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv\n_x000D_CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALgtLimA_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LgtLimA_StAcv = VMMP_CFBACA_p_ACALgtLimA_StAcvSti \n_x000D_CustFctIn_LgtLimA_ADmd = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_APredTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxDecSti \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = VMMP_CFBACA_p_ACALgtLimA_AGrdMaxIncSti \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtLimA_ADmdSti \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0\n_x000D_ELSE:\n_x000D_CustFctIn_LgtLimA_StAcv = ACA_s_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec = ACA_s_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc = ACA_s_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn = ACA_s_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn = 0 \n_x000D_ \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALgtLimA_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = 0 \n_x000D_CustFctIn_LgtLimA_ADmd_sc = 0 \n_x000D_CustFctIn_LgtLimA_APredTar_sc = 0 \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = 0 \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = 0 \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = 0 \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = 0 \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_LgtLimA_StAcv_sc = ACA_sc_LgtLimA_StAcv \n_x000D_CustFctIn_LgtLimA_ADmd_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_APredTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_AGrdMaxDec_sc = ACA_sc_LgtLimA_AGrdMaxDec \n_x000D_CustFctIn_LgtLimA _AGrdMaxInc_sc = ACA_sc_LgtLimA_AGrdMaxInc \n_x000D_CustFctIn_LgtLimA _ATlrHiTar_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_ATlrHiDyn_sc = ACA_sc_LgtLimA_ADmd \n_x000D_CustFctIn_LgtLimA_MdTarDyn_sc = 0\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtLimA_BitFldConf = VMMP_CFBACA_p_ACALgtLimA_BitFldConf\n_x000D_CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBACA_c_ACALgtLimA_FlgIniExcDet\n_x000D_CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtLimA_FlgErrQlfAcv\n_x000D_CustFctIn_LgtLimA_TurnOff = VMMP_CFBACA_p_ACALgtLimA_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
158	16660695	Pre Condition	Released	no	False	type_not_target, relevance_filtered	RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA LgtLimA-Service: Signal range is valid is always RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA LgtLimA-Service: Signal range is valid is always applied. (Signal range is invalid is never applied) Raw { "ID": "16660695", "ASIL": " QM", "Text": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA LgtLimA-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1359924", "Description": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA LgtLimA-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
159	16660696	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Saturation of input signal The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLim Saturation of input signal The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_ACA. * CAA_s_LgtLimA_ADmd Raw { "ID": "16660696", "ASIL": " QM", "Text": "Saturation of input signal\n_x000D_ \n_x000D_\n_x000D_The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_ACA.\n_x000D_ \n_x000D_* CAA_s_LgtLimA_ADmd", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1359925", "Description": "Saturation of input signal\n_x000D_ \n_x000D_\n_x000D_The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_ACA.\n_x000D_ \n_x000D_* CAA_s_LgtLimA_ADmd", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
160	18404829	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Saturation of input signal The following input signals must be saturated to the maximum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLim Saturation of input signal The following input signals must be saturated to the maximum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimLo_ACA. * ACA_s_LgtLimA_ADmd Raw { "ID": "18404829", "ASIL": " QM", "Text": "Saturation of input signal\n_x000D_ \n_x000D_\n_x000D_The following input signals must be saturated to the maximum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimLo_ACA.\n_x000D_ \n_x000D_* ACA_s_LgtLimA_ADmd", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Saturation of input signal\n_x000D_ \n_x000D_\n_x000D_The following input signals must be saturated to the maximum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimHi_ACA and to the minimum value of VMMP_CFBACA_c_SrvLgtLimA_ARngLimLo_ACA.\n_x000D_ \n_x000D_* ACA_s_LgtLimA_ADmd", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
161	16660697	Non-functional	Released	no	False	type_not_target, relevance_filtered	Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail). If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle). Raw { "ID": "16660697", "ASIL": " QM", "Text": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387708", "Description": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
162	16660698	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs StAcv CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv Al Assign generic output signals to specific output signals Outputs StAcv CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv All other Outputs CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn Note: The assignment of the signals above is independent of the following IF statement. States IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve ELSE: CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi Raw { "ID": "16660698", "ASIL": " QM", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_ \n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n_x000D_CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n_x000D_Note: The assignment of the signals above is independent of the following IF statement.\n_x000D_ \n_x000D_States\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_\n_x000D_THEN: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n_x000D_\n_x000D_ELSE: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1359928", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_ \n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n_x000D_CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n_x000D_Note: The assignment of the signals above is independent of the following IF statement.\n_x000D_ \n_x000D_States\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_\n_x000D_THEN: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n_x000D_\n_x000D_ELSE: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
163	18404843	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs StAcv CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv Al Assign generic output signals to specific output signals Outputs StAcv CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv All other Outputs CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar CFBACA_s_ACALgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec CFBACA_s_ACALgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn Note: The assignment of the signals above is independent of the following IF statement. States IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve ELSE: CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi Raw { "ID": "18404843", "ASIL": " QM", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_ \n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n_x000D_CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n_x000D_CFBACA_s_ACALgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n_x000D_Note: The assignment of the signals above is independent of the following IF statement.\n_x000D_ \n_x000D_States\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n_x000D_ELSE: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_ \n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n_x000D_CFBACA_s_ACALgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n_x000D_CFBACA_s_ACALgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n_x000D_Note: The assignment of the signals above is independent of the following IF statement.\n_x000D_ \n_x000D_States\n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_THEN: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n_x000D_ELSE: \n_x000D_CFBACA_s_DiagACALgtLimA_StEve = VMMP_c_DiagEveSigDi", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
164	16660699	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA LgtCtl Service ACA LgtCtl Service Raw { "ID": "16660699", "ASIL": " ", "Text": "ACA LgtCtl Service", "Type": "Folder", "Status": "", "Summary": "ACA LgtCtl Service", "Relevant": "no", "column_12": "", "Foreign ID": "1337925", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
165	16660700	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctI Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_LgtCtl_StAcv = ACA_s_LgtCtl_StAcv CustFctIn_LgtCtlCtlA_ADmd = ACA_s_LgtCtlA_ADmd CustFctIn_LgtCtlCtlA_APredTar = ACA_s_LgtCtlA_APredTar CustFctIn_LgtCtlCtlA_AGrdMaxDec = ACA_s_LgtCtlA_AGrdMaxDec CustFctIn_LgtCtlCtlA_AGrdMaxInc = ACA_s_LgtCtlA_AGrdMaxInc CustFctIn_LgtCtlCtlA_ATlrHiTar = ACA_s_LgtCtlA_ATlrHiTar CustFctIn_LgtCtlCtlA_ATlrHiDyn = ACA_s_LgtCtlA_ATlrHiDyn CustFctIn_LgtCtlCtlA_ATlrLoTar = ACA_s_LgtCtlA_ATlrLoTar CustFctIn_LgtCtlCtlA_MdDeceOnly = ACA_s_LgtCtlA_MdDeceOnly CustFctIn_LgtCtlCtlA_MdTarDyn = ACA_s_LgtCtlA_MdTarDyn CustFctIn_LgtCtlLimD_StAcv = ACA_s_LgtLimD_StAcv CustFctIn_LgtCtlLimD_DTar = ACA_s_LgtLimD_DTar CustFctIn_LgtCtlLimD_StUpd = ACA_s_LgtLimD_StUpd CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd = ACA_s_LgtStgy_TiRdyDrvOffDmd CustFctIn_LgtCtl_StSailReq = ACA_s_LgtCtl_StSailReq Signal-Classifier: CustFctIn_LgtCtl_StAcv_sc = ACA_sc_LgtCtl_StAcv CustFctIn_LgtCtlCtlA_ADmd_sc = ACA_sc_LgtCtlA_ADmd CustFctIn_LgtCtlCtlA_APredTar_sc = ACA_sc_LgtCtlA_APredTar CustFctIn_LgtCtlCtlA_AGrdMaxDec_sc = ACA_sc_LgtCtlA_AGrdMaxDec CustFctIn_LgtCtlCtlA_AGrdMaxInc_sc = ACA_sc_LgtCtlA_AGrdMaxInc CustFctIn_LgtCtlCtlA_ATlrHiTar_sc = ACA_sc_LgtCtlA_ATlrHiTar CustFctIn_LgtCtlCtlA_ATlrHiDyn_sc = ACA_sc_LgtCtlA_ATlrHiDyn CustFctIn_LgtCtlCtlA_ATlrLoTar_sc = ACA_sc_LgtCtlA_ATlrLoTar CustFctIn_LgtCtlCtlA_MdDeceOnly_sc = ACA_sc_LgtCtlA_MdDeceOnly CustFctIn_LgtCtlCtlA_MdTarDyn_sc = ACA_sc_LgtCtlA_MdTarDyn CustFctIn_LgtCtlLimD_StAcv_sc = ACA_sc_LgtLimD_StAcv CustFctIn_LgtCtlLimD_DTar_sc = ACA_sc_LgtLimD_DTar CustFctIn_LgtCtlLimD_StUpd_sc = ACA_sc_LgtLimD_StUpd CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd_sc = ACA_sc_LgtStgy_TiRdyDrvOffDmd CustFctIn_LgtCtl_StSailReq_sc = ACA_sc_LgtCtl_StSailReq Parameters CustFctIn_LgtCtl_BitFldConf = VMMP_CFBACA_p_ACALgtCtl_BitFldConf CustFctIn_LgtCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALgtCtl_FlgIniExcDet CustFctIn_LgtCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtCtl_FlgErrQlfAcv CustFctIn_LgtCtl_TurnOff = VMMP_CFBACA_p_ACALgtCtl_TurnOff Raw { "ID": "16660700", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LgtCtl_StAcv = ACA_s_LgtCtl_StAcv \n_x000D_CustFctIn_LgtCtlCtlA_ADmd = ACA_s_LgtCtlA_ADmd \n_x000D_CustFctIn_LgtCtlCtlA_APredTar = ACA_s_LgtCtlA_APredTar \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxDec = ACA_s_LgtCtlA_AGrdMaxDec \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxInc = ACA_s_LgtCtlA_AGrdMaxInc \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiTar = ACA_s_LgtCtlA_ATlrHiTar \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiDyn = ACA_s_LgtCtlA_ATlrHiDyn \n_x000D_CustFctIn_LgtCtlCtlA_ATlrLoTar = ACA_s_LgtCtlA_ATlrLoTar \n_x000D_CustFctIn_LgtCtlCtlA_MdDeceOnly = ACA_s_LgtCtlA_MdDeceOnly \n_x000D_CustFctIn_LgtCtlCtlA_MdTarDyn = ACA_s_LgtCtlA_MdTarDyn \n_x000D_ \n_x000D_CustFctIn_LgtCtlLimD_StAcv = ACA_s_LgtLimD_StAcv \n_x000D_CustFctIn_LgtCtlLimD_DTar = ACA_s_LgtLimD_DTar \n_x000D_CustFctIn_LgtCtlLimD_StUpd = ACA_s_LgtLimD_StUpd \n_x000D_ \n_x000D_CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd = ACA_s_LgtStgy_TiRdyDrvOffDmd \n_x000D_CustFctIn_LgtCtl_StSailReq = ACA_s_LgtCtl_StSailReq\n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LgtCtl_StAcv_sc = ACA_sc_LgtCtl_StAcv \n_x000D_CustFctIn_LgtCtlCtlA_ADmd_sc = ACA_sc_LgtCtlA_ADmd \n_x000D_CustFctIn_LgtCtlCtlA_APredTar_sc = ACA_sc_LgtCtlA_APredTar \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxDec_sc = ACA_sc_LgtCtlA_AGrdMaxDec \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxInc_sc = ACA_sc_LgtCtlA_AGrdMaxInc \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiTar_sc = ACA_sc_LgtCtlA_ATlrHiTar \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiDyn_sc = ACA_sc_LgtCtlA_ATlrHiDyn \n_x000D_CustFctIn_LgtCtlCtlA_ATlrLoTar_sc = ACA_sc_LgtCtlA_ATlrLoTar \n_x000D_CustFctIn_LgtCtlCtlA_MdDeceOnly_sc = ACA_sc_LgtCtlA_MdDeceOnly \n_x000D_CustFctIn_LgtCtlCtlA_MdTarDyn_sc = ACA_sc_LgtCtlA_MdTarDyn \n_x000D_ \n_x000D_CustFctIn_LgtCtlLimD_StAcv_sc = ACA_sc_LgtLimD_StAcv \n_x000D_CustFctIn_LgtCtlLimD_DTar_sc = ACA_sc_LgtLimD_DTar \n_x000D_CustFctIn_LgtCtlLimD_StUpd_sc = ACA_sc_LgtLimD_StUpd \n_x000D_ \n_x000D_CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd_sc = ACA_sc_LgtStgy_TiRdyDrvOffDmd \n_x000D_CustFctIn_LgtCtl_StSailReq_sc = ACA_sc_LgtCtl_StSailReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtCtl_BitFldConf = VMMP_CFBACA_p_ACALgtCtl_BitFldConf\n_x000D_CustFctIn_LgtCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALgtCtl_FlgIniExcDet\n_x000D_CustFctIn_LgtCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LgtCtl_TurnOff = VMMP_CFBACA_p_ACALgtCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337932", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LgtCtl_StAcv = ACA_s_LgtCtl_StAcv \n_x000D_CustFctIn_LgtCtlCtlA_ADmd = ACA_s_LgtCtlA_ADmd \n_x000D_CustFctIn_LgtCtlCtlA_APredTar = ACA_s_LgtCtlA_APredTar \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxDec = ACA_s_LgtCtlA_AGrdMaxDec \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxInc = ACA_s_LgtCtlA_AGrdMaxInc \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiTar = ACA_s_LgtCtlA_ATlrHiTar \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiDyn = ACA_s_LgtCtlA_ATlrHiDyn \n_x000D_CustFctIn_LgtCtlCtlA_ATlrLoTar = ACA_s_LgtCtlA_ATlrLoTar \n_x000D_CustFctIn_LgtCtlCtlA_MdDeceOnly = ACA_s_LgtCtlA_MdDeceOnly \n_x000D_CustFctIn_LgtCtlCtlA_MdTarDyn = ACA_s_LgtCtlA_MdTarDyn \n_x000D_ \n_x000D_CustFctIn_LgtCtlLimD_StAcv = ACA_s_LgtLimD_StAcv \n_x000D_CustFctIn_LgtCtlLimD_DTar = ACA_s_LgtLimD_DTar \n_x000D_CustFctIn_LgtCtlLimD_StUpd = ACA_s_LgtLimD_StUpd \n_x000D_ \n_x000D_CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd = ACA_s_LgtStgy_TiRdyDrvOffDmd \n_x000D_CustFctIn_LgtCtl_StSailReq = ACA_s_LgtCtl_StSailReq\n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LgtCtl_StAcv_sc = ACA_sc_LgtCtl_StAcv \n_x000D_CustFctIn_LgtCtlCtlA_ADmd_sc = ACA_sc_LgtCtlA_ADmd \n_x000D_CustFctIn_LgtCtlCtlA_APredTar_sc = ACA_sc_LgtCtlA_APredTar \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxDec_sc = ACA_sc_LgtCtlA_AGrdMaxDec \n_x000D_CustFctIn_LgtCtlCtlA_AGrdMaxInc_sc = ACA_sc_LgtCtlA_AGrdMaxInc \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiTar_sc = ACA_sc_LgtCtlA_ATlrHiTar \n_x000D_CustFctIn_LgtCtlCtlA_ATlrHiDyn_sc = ACA_sc_LgtCtlA_ATlrHiDyn \n_x000D_CustFctIn_LgtCtlCtlA_ATlrLoTar_sc = ACA_sc_LgtCtlA_ATlrLoTar \n_x000D_CustFctIn_LgtCtlCtlA_MdDeceOnly_sc = ACA_sc_LgtCtlA_MdDeceOnly \n_x000D_CustFctIn_LgtCtlCtlA_MdTarDyn_sc = ACA_sc_LgtCtlA_MdTarDyn \n_x000D_ \n_x000D_CustFctIn_LgtCtlLimD_StAcv_sc = ACA_sc_LgtLimD_StAcv \n_x000D_CustFctIn_LgtCtlLimD_DTar_sc = ACA_sc_LgtLimD_DTar \n_x000D_CustFctIn_LgtCtlLimD_StUpd_sc = ACA_sc_LgtLimD_StUpd \n_x000D_ \n_x000D_CustFctIn_LgtCtlStgy_TiRdyDrvOffDmd_sc = ACA_sc_LgtStgy_TiRdyDrvOffDmd \n_x000D_CustFctIn_LgtCtl_StSailReq_sc = ACA_sc_LgtCtl_StSailReq\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LgtCtl_BitFldConf = VMMP_CFBACA_p_ACALgtCtl_BitFldConf\n_x000D_CustFctIn_LgtCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALgtCtl_FlgIniExcDet\n_x000D_CustFctIn_LgtCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALgtCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LgtCtl_TurnOff = VMMP_CFBACA_p_ACALgtCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
166	16660701	Pre Condition	Released	no	False	type_not_target, relevance_filtered	RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA LgtCtl-Service: Signal range is valid is always a RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA LgtCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied) Raw { "ID": "16660701", "ASIL": " ASIL B", "Text": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA LgtCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1355348", "Description": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA LgtCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
167	16660702	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Saturation of input signals The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARn Saturation of input signals The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimHi_Dft and to the minimum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimLo_Dft. * ACA_s_LgtCtlA_ADmd * ACA_s_LgtCtlA_APredTar * ACA_s_LgtCtlA_ATlrHiTar * ACA_s_LgtCtlA_ATlrHiDyn * ACA_s_LgtCtlA_ATlrLoTar Raw { "ID": "16660702", "ASIL": " QM", "Text": "Saturation of input signals\n_x000D_ \n_x000D_\n_x000D_The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimHi_Dft and to the minimum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimLo_Dft.\n_x000D_ \n_x000D_* ACA_s_LgtCtlA_ADmd\n_x000D_* ACA_s_LgtCtlA_APredTar\n_x000D_* ACA_s_LgtCtlA_ATlrHiTar\n_x000D_* ACA_s_LgtCtlA_ATlrHiDyn\n_x000D_* ACA_s_LgtCtlA_ATlrLoTar", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1355350", "Description": "Saturation of input signals\n_x000D_ \n_x000D_\n_x000D_The following input signals must be saturated to the maximum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimHi_Dft and to the minimum value of VMMP_SINFCT_c_SrvLgtCtlCtlA_ARngLimLo_Dft.\n_x000D_ \n_x000D_* ACA_s_LgtCtlA_ADmd\n_x000D_* ACA_s_LgtCtlA_APredTar\n_x000D_* ACA_s_LgtCtlA_ATlrHiTar\n_x000D_* ACA_s_LgtCtlA_ATlrHiDyn\n_x000D_* ACA_s_LgtCtlA_ATlrLoTar", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
168	16660703	Non-functional	Released	no	False	type_not_target, relevance_filtered	Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a Fault Tolerant Time Interval (FTTI) Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail). If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle). Raw { "ID": "16660703", "ASIL": " QM", "Text": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Type": "Non-functional", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387709", "Description": "Fault Tolerant Time Interval (FTTI) \n_x000D_Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n_x000D_ \n_x000D_If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
169	16660704	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true THEN: CFBAC Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true THEN: CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti CFBACA_s_ACALgtCtl_StAcvLimD = VMMP_CFBACA_p_ACALgtCtl_StAcvLimDSti CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti ELSE: StAcv CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv All other Outputs CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn CFBACA_s_ACALgtCtl_StAcvLimD = CustFctOut_LgtCtlLimD_StAcv CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq Note: The assignment of the following signals is independent of the IF statement above. States CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve Raw { "ID": "16660704", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true\n_x000D_THEN: \n_x000D_CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti \n_x000D_CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti \n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti \n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti \n_x000D_CFBACA_s_ACALgtCtl_StAcvLimD = VMMP_CFBACA_p_ACALgtCtl_StAcvLimDSti \n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti \n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti\n_x000D_ELSE:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd\n_x000D_CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn\n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar\n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly\n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn\n_x000D_CFBACA_s_ACALgtCtl_StAcvLimD = CustFctOut_LgtCtlLimD_StAcv\n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar\n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd\n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd\n_x000D_CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq\n_x000D_Note: The assignment of the following signals is independent of the IF statement above.\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1337954", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true\n_x000D_THEN: \n_x000D_CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti \n_x000D_CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti \n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti \n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti \n_x000D_CFBACA_s_ACALgtCtl_StAcvLimD = VMMP_CFBACA_p_ACALgtCtl_StAcvLimDSti \n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti \n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti\n_x000D_ELSE:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd\n_x000D_CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn\n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar\n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly\n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn\n_x000D_CFBACA_s_ACALgtCtl_StAcvLimD = CustFctOut_LgtCtlLimD_StAcv\n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar\n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd\n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd\n_x000D_CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq\n_x000D_Note: The assignment of the following signals is independent of the IF statement above.\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
170	18406342	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true THEN: CFBAC Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true THEN: CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti ELSE: StAcv CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv FlgAcv CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv All other Outputs CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq Note: The assignment of the following signals is independent of the IF statement above. States CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve Raw { "ID": "18406342", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true\n_x000D_THEN: \n_x000D_CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti \n_x000D_CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti \n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti \n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti \n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti \n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti\n_x000D_ELSE:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv\n_x000D_FlgAcv\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd\n_x000D_CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn\n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar\n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly\n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn\n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar\n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd\n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd\n_x000D_CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq\n_x000D_ \n_x000D_ \n_x000D_Note: The assignment of the following signals is independent of the IF statement above.\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve", "Type": "Functional", "Status": "Released", "Summary": "Assign generic output signals to specific output signals", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true\n_x000D_THEN: \n_x000D_CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti \n_x000D_CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti \n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti \n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti \n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti \n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti\n_x000D_ELSE:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv\n_x000D_FlgAcv\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd\n_x000D_CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn\n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar\n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly\n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn\n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar\n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd\n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd\n_x000D_CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq\n_x000D_ \n_x000D_ \n_x000D_Note: The assignment of the following signals is independent of the IF statement above.\n_x000D_ \n_x000D_States\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
171	59882955	Functional	Released	yes	True		Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true THEN: CFBAC Assign generic output signals to specific output signals Outputs IF: VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true THEN: CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti CFBACA_s_DiagACALgtCtl_StEve = VMMP_CFBACA_p_ACALgtCtl_DiagEveSti ELSE: StAcv CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv FlgAcv CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv All other Outputs CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq States CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve Raw { "ID": "59882955", "ASIL": " ASIL B", "Text": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true\n_x000D_THEN: \n_x000D_CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti \n_x000D_CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti \n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti \n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti \n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti \n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = VMMP_CFBACA_p_ACALgtCtl_DiagEveSti\n_x000D_ELSE:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv\n_x000D_FlgAcv\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd\n_x000D_CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn\n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar\n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly\n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn\n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar\n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd\n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd\n_x000D_CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq\n_x000D_States\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve", "Type": "Functional", "Status": "Released", "Summary": "Assign generic output signals to specific output signals", "Relevant": "yes", "column_12": "", "Foreign ID": "", "Description": "Assign generic output signals to specific output signals\n_x000D_ \n_x000D_Outputs\n_x000D_IF: \n_x000D_VMMP_CFBACA_p_ACALgtCtl_SwLgtCtlSti = true\n_x000D_THEN: \n_x000D_CFBACA_s_ACALgtCtl_StAcv = VMMP_CFBACA_p_ACALgtCtl_StAcvSti\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = VMMP_CFBACA_p_ACALgtCtl_FlgAcvLimDSti\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = VMMP_CFBACA_p_ACALgtCtlA_ADmdSti \n_x000D_CFBACA_s_ACALgtCtlA_APredTar = VMMP_CFBACA_p_ACALgtCtlA_APredTarSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxDecSti \n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = VMMP_CFBACA_p_ACALgtCtlA_AGrdMaxIncSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiTarSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = VMMP_CFBACA_p_ACALgtCtlA_ATlrHiDynSti \n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = VMMP_CFBACA_p_ACALgtCtlA_ATlrLoTarSti \n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = VMMP_CFBACA_p_ACALgtCtlA_MdDeceOnlySti \n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = VMMP_CFBACA_p_ACALgtCtlA_MdTarDynSti \n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = VMMP_CFBACA_p_ACALgtCtl_DTarLimDSti \n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = VMMP_CFBACA_p_ACALgtCtl_FlgUpdLimDSti \n_x000D_CFBACA_s_ACALgtCtl_StSailReq = VMMP_CFBACA_p_ACALgtCtl_StSailReqSti\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = VMMP_CFBACA_p_ACALgtCtl_DiagEveSti\n_x000D_ELSE:\n_x000D_StAcv\n_x000D_CFBACA_s_ACALgtCtl_StAcv = CustFctOut_LgtCtl_StAcv\n_x000D_FlgAcv\n_x000D_CFBACA_s_ACALgtCtl_FlgAcvLimD = CustFctOut_LgtCtlLimD_FlgAcv\n_x000D_All other Outputs\n_x000D_CFBACA_s_ACALgtCtlA_ADmd = CustFctOut_LgtCtlCtlA_ADmd\n_x000D_CFBACA_s_ACALgtCtlA_APredTar = CustFctOut_LgtCtlCtlA_APredTar\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxDec = CustFctOut_LgtCtlCtlA_AGrdMaxDec\n_x000D_CFBACA_s_ACALgtCtlA_AGrdMaxInc = CustFctOut_LgtCtlCtlA_AGrdMaxInc\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiTar = CustFctOut_LgtCtlCtlA_ATlrHiTar\n_x000D_CFBACA_s_ACALgtCtlA_ATlrHiDyn = CustFctOut_LgtCtlCtlA_ATlrHiDyn\n_x000D_CFBACA_s_ACALgtCtlA_ATlrLoTar = CustFctOut_LgtCtlCtlA_ATlrLoTar\n_x000D_CFBACA_s_ACALgtCtlA_MdDeceOnly = CustFctOut_LgtCtlCtlA_MdDeceOnly\n_x000D_CFBACA_s_ACALgtCtlA_MdTarDyn = CustFctOut_LgtCtlCtlA_MdTarDyn\n_x000D_CFBACA_s_ACALgtCtl_DTarLimD = CustFctOut_LgtCtlLimD_DTar\n_x000D_CFBACA_s_ACALgtCtl_FlgUpdLimD = CustFctOut_LgtCtlLimD_FlgUpd\n_x000D_CFBACA_s_ACALgtStgy_TiRdyDrvOffDmd = CustFctOut_LgtCtlStgy_TiRdyDrvOffDmd\n_x000D_CFBACA_s_ACALgtCtl_StSailReq = CustFctOut_LgtCtl_StSailReq\n_x000D_States\n_x000D_CFBACA_s_DiagACALgtCtl_StEve = CustFctOut_LgtCtl_StDiagEve", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
172	16660705	Information		no	False	type_not_target, status_filtered, relevance_filtered	The output signal CFBACA_s_ACALgtCtl_StVld is defined by the merged StDiagEve signals of ACA LgtLimA and ACA LgtCtl service. The The output signal CFBACA_s_ACALgtCtl_StVld is defined by the merged StDiagEve signals of ACA LgtLimA and ACA LgtCtl service. Therefore CustFctOut_LgtCtl_StDiagEve as well as CustFctOut_LgtLimA_StDiagEve or VMMP_c_DiagEveSigNone depending on VSOCH_s_FlgACAHF_Ena and VMMP_CFBACA_p_ACAHF_Ena shall be used for calculation of StDiagEve in the following PreCondition. Raw { "ID": "16660705", "ASIL": " ", "Text": "The output signal CFBACA_s_ACALgtCtl_StVld is defined by the merged StDiagEve signals of ACA LgtLimA and ACA LgtCtl service.\n_x000D_Therefore CustFctOut_LgtCtl_StDiagEve as well as CustFctOut_LgtLimA_StDiagEve or VMMP_c_DiagEveSigNone depending on VSOCH_s_FlgACAHF_Ena and VMMP_CFBACA_p_ACAHF_Ena shall be used for calculation of StDiagEve in the following PreCondition.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361448", "Description": "The output signal CFBACA_s_ACALgtCtl_StVld is defined by the merged StDiagEve signals of ACA LgtLimA and ACA LgtCtl service.\n_x000D_Therefore CustFctOut_LgtCtl_StDiagEve as well as CustFctOut_LgtLimA_StDiagEve or VMMP_c_DiagEveSigNone depending on VSOCH_s_FlgACAHF_Ena and VMMP_CFBACA_p_ACAHF_Ena shall be used for calculation of *StDiagEve in the following PreCondition.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
173	16660706	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Assignment for Mapping (ACA LgtLimA and ACA LgtCtl): StDiagEve = CustFctOut_LgtCtl_StDiagEve Note: The assignment of the signal Assignment for Mapping (ACA LgtLimA and ACA LgtCtl): StDiagEve = CustFctOut_LgtCtl_StDiagEve Note: The assignment of the signals above is independent of the following IF statement. IF [AND(1,2)]: 1) VSOCH_s_FlgACAHF_Ena is true 2) VMMP_CFBACA_p_ACAHF_Ena is true THEN: StDiagEve = CustFctOut_LgtLimA_StDiagEve ELSE: StDiagEve = VMMP_c_DiagEveSigNone Raw { "ID": "16660706", "ASIL": " QM", "Text": "Assignment for Mapping (ACA LgtLimA and ACA LgtCtl):\n_x000D_ \n_x000D_StDiagEve = CustFctOut_LgtCtl_StDiagEve\n_x000D_ \n_x000D_Note: The assignment of the signals above is independent of the following IF statement.\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_\n_x000D_THEN: \n_x000D_StDiagEve = CustFctOut_LgtLimA_StDiagEve\n_x000D_\n_x000D_ELSE: \n_x000D_StDiagEve = VMMP_c_DiagEveSigNone", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1338090", "Description": "Assignment for Mapping (ACA LgtLimA and ACA LgtCtl):\n_x000D_ \n_x000D_StDiagEve = CustFctOut_LgtCtl_StDiagEve\n_x000D_ \n_x000D_Note: The assignment of the signals above is independent of the following IF statement.\n_x000D_ \n_x000D_IF [AND(1,2)]:\n_x000D_1) VSOCH_s_FlgACAHF_Ena is true\n_x000D_2) VMMP_CFBACA_p_ACAHF_Ena is true\n_x000D_\n_x000D_THEN: \n_x000D_StDiagEve = CustFctOut_LgtLimA_StDiagEve\n_x000D_\n_x000D_ELSE: \n_x000D_StDiagEve = VMMP_c_DiagEveSigNone", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
174	16660707	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping StDiagEve to StVld IF: StDiagEve = VMMP_c_DiagEveSigNotVld THEN: StVld = 3 ELSEIF: StDiagEve = VMMP_c_DiagEveS Mapping StDiagEve to StVld IF: StDiagEve = VMMP_c_DiagEveSigNotVld THEN: StVld = 3 ELSEIF: StDiagEve = VMMP_c_DiagEveSigFail THEN: StVld = 3 ELSEIF: StDiagEve = VMMP_c_DiagEveSigDi THEN: StVld = 2 ELSEIF: StDiagEve = VMMP_c_DiagEveSigIni THEN: StVld = 2 ELSEIF: StDiagEve = VMMP_c_DiagEveSigSusp THEN: StVld = 0 ELSEIF: StDiagEve = VMMP_c_DiagEveSigNone THEN: StVld = 1 Raw { "ID": "16660707", "ASIL": " QM", "Text": "Mapping StDiagEve to StVld\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN:\n_x000D_StVld = 0\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN:\n_x000D_StVld = 1", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337952", "Description": "Mapping StDiagEve to StVld\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_StDiagEve = VMMP_c_DiagEveSigNotVld\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigFail\n_x000D_THEN:\n_x000D_StVld = 3\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigDi\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigIni\n_x000D_THEN:\n_x000D_StVld = 2\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigSusp\n_x000D_THEN:\n_x000D_StVld = 0\n_x000D_ELSEIF:\n_x000D_StDiagEve = VMMP_c_DiagEveSigNone\n_x000D_THEN:\n_x000D_*StVld = 1", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
175	16660708	Functional	Released	yes	True		Merging several StVld to one StVld considering prioritization: CFBACA_s_ACALgtCtl_StVld = StVld (considering: Assignment for Merging several StVld to one StVld considering prioritization: CFBACA_s_ACALgtCtl_StVld = StVld (considering: Assignment for Mapping (ACA LgtLimA and ACA LgtCtl): and Mapping StDiagEve to StVld) Prioritization if different StVld values are set at the same time (based on StDiagEve): Prio 1: StVld = 3 (Failure) Prio 2: StVld = 2 (Init) Prio 3: StVld = 0 (Suspicious) Prio 4: StVld = 1 (Valid) Raw { "ID": "16660708", "ASIL": " QM", "Text": "Merging several StVld to one StVld considering prioritization:\n_x000D_ \n_x000D_CFBACA_s_ACALgtCtl_StVld = StVld\n_x000D_(considering: Assignment for Mapping (ACA LgtLimA and ACA LgtCtl): and Mapping StDiagEve to StVld)\n_x000D_ \n_x000D_Prioritization if different StVld values are set at the same time (based on StDiagEve):\n_x000D_Prio 1: StVld = 3 (Failure)\n_x000D_Prio 2: StVld = 2 (Init)\n_x000D_Prio 3: StVld = 0 (Suspicious)\n_x000D_Prio 4: StVld = 1 (Valid)", "Type": "Functional", "Status": "Released", "Summary": "", "Relevant": "yes", "column_12": "", "Foreign ID": "1361446", "Description": "Merging several StVld to one StVld considering prioritization:\n_x000D_ \n_x000D_CFBACA_s_ACALgtCtl_StVld = StVld\n_x000D_(considering: Assignment for Mapping (ACA LgtLimA and ACA LgtCtl): and Mapping StDiagEve to StVld)\n_x000D_ \n_x000D_Prioritization if different StVld values are set at the same time (based on StDiagEve):\n_x000D_Prio 1: StVld = 3 (Failure)\n_x000D_Prio 2: StVld = 2 (Init)\n_x000D_Prio 3: StVld = 0 (Suspicious)\n_x000D_Prio 4: StVld = 1 (Valid)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
176	16660709	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA Lateral Control ACA Lateral Control Raw { "ID": "16660709", "ASIL": " ", "Text": "ACA Lateral Control", "Type": "Folder", "Status": "", "Summary": "ACA Lateral Control", "Relevant": "no", "column_12": "", "Foreign ID": "1361567", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
177	16660710	Information		no	False	type_not_target, status_filtered, relevance_filtered	Depending on whether ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), Depending on whether ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), "ACA LatCtl Service" or "ACA HndFre Service" shall be used for "ACA Lateral Control". ACA LatCtl Service uses the generic LatCtl Service Bridge. ACA HndFre Service uses a specific HndFre Service Bridge, which is described in chapter "ACA HndFre Service". HndFre Service Bridge is similar to LatCtl Service Bridge. Depending on whether ACA HF is coded and enabled, the specific output signals of ACA LatCtl shall be defined by LatCtl Service or HndFre Service. Raw { "ID": "16660710", "ASIL": " ", "Text": "Depending on whether ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), \"ACA LatCtl Service\" or \"ACA HndFre Service\" shall be used for \"ACA Lateral Control\".\n_x000D_ \n_x000D_ACA LatCtl Service uses the generic LatCtl Service Bridge.\n_x000D_ACA HndFre Service uses a specific HndFre Service Bridge, which is described in chapter \"ACA HndFre Service\". HndFre Service Bridge is similar to LatCtl Service Bridge.\n_x000D_ \n_x000D_Depending on whether ACA HF is coded and enabled, the specific output signals of ACA LatCtl shall be defined by LatCtl Service or HndFre Service.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361569", "Description": "Depending on whether ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true), \"ACA LatCtl Service\" or \"ACA HndFre Service\" shall be used for \"ACA Lateral Control\".\n_x000D_ \n_x000D_ACA LatCtl Service uses the generic LatCtl Service Bridge.\n_x000D_ACA HndFre Service uses a specific HndFre Service Bridge, which is described in chapter \"ACA HndFre Service\". HndFre Service Bridge is similar to LatCtl Service Bridge.\n_x000D_ \n_x000D_Depending on whether ACA HF is coded and enabled, the specific output signals of ACA LatCtl shall be defined by LatCtl Service or HndFre Service.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
178	16660711	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA LatCtl Service ACA LatCtl Service Raw { "ID": "16660711", "ASIL": " ", "Text": "ACA LatCtl Service", "Type": "Folder", "Status": "", "Summary": "ACA LatCtl Service", "Relevant": "no", "column_12": "", "Foreign ID": "1337978", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
179	16660712	Information		no	False	type_not_target, status_filtered, relevance_filtered	"ACA LatCtl Service" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFB "ACA LatCtl Service" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false). If "ACA HndFre Service" shall be used, this chapter shall be skipped. Raw { "ID": "16660712", "ASIL": " ", "Text": "\"ACA LatCtl Service\" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false).\n_x000D_ \n_x000D_If \"ACA HndFre Service\" shall be used, this chapter shall be skipped.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387741", "Description": "\"ACA LatCtl Service\" shall be used if ACA HF (ACA Handsfree) is not coded (VSOCH_s_FlgACAHF_Ena is false) or not enabled (VMMP_CFBACA_p_ACAHF_Ena is false).\n_x000D_ \n_x000D_If \"ACA HndFre Service\" shall be used, this chapter shall be skipped.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
180	16660713	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctI Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0 CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0 CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd Parameters CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff Raw { "ID": "16660713", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet\n_x000D_CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "1337977", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet\n_x000D_CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
181	59830238	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACALatCtl_SwSti = true THEN: CustFctIn_LatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti CustFctIn_LatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti CustFctIn_LatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0 CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti ELSE: CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0 CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd Signal-Classifier: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACALatCtl_SwSti = true THEN: CustFctIn_LatCtl_StAcv_sc = 0 CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = 0 CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = 0 CustFctIn_LatCtlCrvtCtl_FacSsty_sc = 0 CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = 0 CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0 CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0 ELSE: CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0 CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd Parameters CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff Raw { "ID": "59830238", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti\n_x000D_ELSE:\n_x000D_CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LatCtl_StAcv_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet\n_x000D_CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti\n_x000D_ELSE:\n_x000D_CustFctIn_LatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_CrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_LatCtl_StAcv_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc = 0 \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_LatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_LatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_LatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_LatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_LatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_LatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACALatCtl_FlgIniExcDet\n_x000D_CustFctIn_LatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACALatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_LatCtl_TurnOff = VMMP_CFBACA_p_ACALatCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
182	16660714	Pre Condition	Released	no	False	type_not_target, relevance_filtered	RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA LatCtl-Service: Signal range is valid is always a RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA LatCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied) Raw { "ID": "16660714", "ASIL": " ASIL B", "Text": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA LatCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)\n_x000D_ \n_x000D_", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1337991", "Description": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA LatCtl-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)\n_x000D_ \n_x000D_", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
183	16660715	Folder		no	False	type_not_target, status_filtered, relevance_filtered	ACA HndFre Service ACA HndFre Service Raw { "ID": "16660715", "ASIL": " ", "Text": "ACA HndFre Service", "Type": "Folder", "Status": "", "Summary": "ACA HndFre Service", "Relevant": "no", "column_12": "", "Foreign ID": "1361510", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
184	16660716	Information		no	False	type_not_target, status_filtered, relevance_filtered	"ACA HndFre Service" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_AC "ACA HndFre Service" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true). Therefore the specific Service Bridge "HndFre Service Bridge" shall be applied. If "ACA LatCtl Service" shall be used, this chapter shall be skipped. Raw { "ID": "16660716", "ASIL": " ", "Text": "\"ACA HndFre Service\" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true).\n_x000D_Therefore the specific Service Bridge \"HndFre Service Bridge\" shall be applied.\n_x000D_ \n_x000D_If \"ACA LatCtl Service\" shall be used, this chapter shall be skipped.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1387743", "Description": "\"ACA HndFre Service\" shall be used if ACA HF (ACA Handsfree) is coded (VSOCH_s_FlgACAHF_Ena is true) and enabled (VMMP_CFBACA_p_ACAHF_Ena is true).\n_x000D_Therefore the specific Service Bridge \"HndFre Service Bridge\" shall be applied.\n_x000D_ \n_x000D_If \"ACA LatCtl Service\" shall be used, this chapter shall be skipped.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
185	16660717	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctI Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1 CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1 CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd Parameters CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff Raw { "ID": "16660717", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "1361512", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters\n_x000D_ \n_x000D_\n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
186	18427048	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFct Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1 CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1 CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc Parameters CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff Raw { "ID": "18427048", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
187	42217257	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Replace generic input signals by specific input signal values, signal classifiers and parameters Inputs Signal-Values: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACALatCtl_SwSti = true THEN: CustFctIn_HndFreLatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 = VMMP_CFBACA_p_ACALatCtl_StHndDet1Sti CustFctIn_HndFre_StHndDet2 = VMMP_CFBACA_p_ACALatCtl_StHndDet2Sti CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti ELSE: CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1 CustFctIn_HndFre_StHndDet2 = ACA_s_HndFre_StHndDet2 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd Signal-Classifier: (Note: Input signals can be overwritten with stimulation parameters) IF: VMMP_CFBACA_p_ACALatCtl_SwSti = true THEN: CustFctIn_HndFreLatCtl_StAcv_sc = 0 CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = 0 CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = 0 CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = 0 CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = 0 CustFctIn_HndFre_StHndDet1_sc = 0 CustFctIn_HndFre_StHndDet2_sc = 0 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0 CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = 0 ELSE: CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1 CustFctIn_HndFre_StHndDet2_sc = ACA_sc_HndFre_StHndDet2 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc Parameters CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff Raw { "ID": "42217257", "ASIL": " ASIL B", "Text": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = VMMP_CFBACA_p_ACALatCtl_StHndDet1Sti\n_x000D_CustFctIn_HndFre_StHndDet2 = VMMP_CFBACA_p_ACALatCtl_StHndDet2Sti\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti\n_x000D_ELSE:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1\n_x000D_CustFctIn_HndFre_StHndDet2 = ACA_s_HndFre_StHndDet2\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = 0\n_x000D_CustFctIn_HndFre_StHndDet2_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1\n_x000D_CustFctIn_HndFre_StHndDet2_sc = ACA_sc_HndFre_StHndDet2\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Replace generic input signals by specific input signal values, signal classifiers and parameters", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Replace generic input signals by specific input signal values, signal classifiers and parameters \n_x000D_\n_x000D_ \n_x000D_Inputs\n_x000D_Signal-Values:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = VMMP_CFBACA_p_ACALatCtl_StAcvSti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = VMMP_CFBACA_p_ACALatCtl_CrvtDmdSti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = VMMP_CFBACA_p_ACALatCtl_CrvtGrdDmdSti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = VMMP_CFBACA_p_ACALatCtl_FacSstySti \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = VMMP_CFBACA_p_ACALatCtl_StLimCtlFReqSti\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = VMMP_CFBACA_p_ACALatCtl_StHndDet1Sti\n_x000D_CustFctIn_HndFre_StHndDet2 = VMMP_CFBACA_p_ACALatCtl_StHndDet2Sti\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = VMMP_CFBACA_p_ACALatCtl_AgOffStgWhlDmdSti\n_x000D_ELSE:\n_x000D_CustFctIn_HndFreLatCtl_StAcv = ACA_s_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd = ACA_s_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd = ACA_s_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty = ACA_s_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq = ACA_s_CrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp = ACA_s_CrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1 = ACA_s_HndFre_StHndDet1\n_x000D_CustFctIn_HndFre_StHndDet2 = ACA_s_HndFre_StHndDet2\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd = ACA_s_StgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_(Note: Input signals can be overwritten with stimulation parameters)\n_x000D_IF:\n_x000D_VMMP_CFBACA_p_ACALatCtl_SwSti = true\n_x000D_THEN:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = 0 \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = 0\n_x000D_CustFctIn_HndFre_StHndDet2_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = 0\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = 0\n_x000D_ELSE:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc = ACA_sc_LatCtl_StAcv \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc = ACA_sc_CrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc = ACA_sc_CrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc = ACA_sc_CrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc = ACA_sc_CrvtCtl_StLimCtlFReq\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc = ACA_sc_HndFre_StHndDet1\n_x000D_CustFctIn_HndFre_StHndDet2_sc = ACA_sc_HndFre_StHndDet2\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc = ACA_sc_StgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc = ACA_sc_CrvtCtl_ValCrc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet = VMMP_CFBACA_c_ACAHndFre_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv = VMMP_CFBACA_c_ACAHndFre_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff = VMMP_CFBACA_p_ACAHndFre_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
188	16660718	Pre Condition	Released	no	False	type_not_target, relevance_filtered	RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA HndFre-Service: Signal range is valid is always a RangeCheck: Check if input signal range is valid There is no RangeCheck for ACA HndFre-Service: Signal range is valid is always applied. (Signal range is invalid is never applied) Raw { "ID": "16660718", "ASIL": " ASIL B", "Text": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA HndFre-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361514", "Description": "RangeCheck: Check if input signal range is valid\n_x000D_ \n_x000D_There is no RangeCheck for ACA HndFre-Service: Signal range is valid is always applied. (Signal range is invalid is never applied)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
189	16660719	Folder		no	False	type_not_target, status_filtered, relevance_filtered	HndFre Service Bridge HndFre Service Bridge Raw { "ID": "16660719", "ASIL": " ", "Text": "HndFre Service Bridge", "Type": "Folder", "Status": "", "Summary": "HndFre Service Bridge", "Relevant": "no", "column_12": "", "Foreign ID": "1361459", "Description": "", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
190	16660720	Information		no	False	type_not_target, status_filtered, relevance_filtered	The HndFre Service Bridge is similar to the LatCtl Service Bridge. HndFre Service Bridge has two more inputs (CustFctIn_HndFre_St The HndFre Service Bridge is similar to the LatCtl Service Bridge. HndFre Service Bridge has two more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld . The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter "HndFre Specific Pre Conditions". If "ACA LatCtl Service" shall be used, this chapter shall be skipped. Raw { "ID": "16660720", "ASIL": " ", "Text": "The HndFre Service Bridge is similar to the LatCtl Service Bridge.\n_x000D_HndFre Service Bridge has two more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld .\n_x000D_ \n_x000D_The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter \"HndFre Specific Pre Conditions\".\n_x000D_ \n_x000D_If \"ACA LatCtl Service\" shall be used, this chapter shall be skipped.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361492", "Description": "The HndFre Service Bridge is similar to the LatCtl Service Bridge.\n_x000D_HndFre Service Bridge has two more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld .\n_x000D_ \n_x000D_The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter \"HndFre Specific Pre Conditions\".\n_x000D_ \n_x000D_If \"ACA LatCtl Service\" shall be used, this chapter shall be skipped.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
191	18431390	Information		no	False	type_not_target, status_filtered, relevance_filtered	The HndFre Service Bridge is similar to the LatCtl Service Bridge. HndFre Service Bridge has three more inputs (CustFctIn_HndFre_ The HndFre Service Bridge is similar to the LatCtl Service Bridge. HndFre Service Bridge has three more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc, CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld . The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter "HndFre Specific Pre Conditions". If "ACA LatCtl Service" shall be used, this chapter shall be skipped. Raw { "ID": "18431390", "ASIL": " ", "Text": "The HndFre Service Bridge is similar to the LatCtl Service Bridge.\n_x000D_HndFre Service Bridge has three more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc, CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld .\n_x000D_ \n_x000D_The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter \"HndFre Specific Pre Conditions\".\n_x000D_ \n_x000D_If \"ACA LatCtl Service\" shall be used, this chapter shall be skipped.", "Type": "Information", "Status": "", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "The HndFre Service Bridge is similar to the LatCtl Service Bridge.\n_x000D_HndFre Service Bridge has three more inputs (CustFctIn_HndFre_StHndDet1, CustFctIn_HndFre_StHndDet1_sc, CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc) and two more outputs (CustFctOut_HndFre_StHndDet1, CustFctOut_HndFre_StDiagEve). CustFctOut_LatCtl_StDiagEve is replaced by CustFctOut_HndFre_StDiagEve_for_StVld .\n_x000D_ \n_x000D_The additional logic of HndFre Service Bridge for CustFctOut_HndFre_StDiagEve and Steering-Substitute-Reaction is described in chapter \"HndFre Specific Pre Conditions\".\n_x000D_ \n_x000D_If \"ACA LatCtl Service\" shall be used, this chapter shall be skipped.", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
192	16660721	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtG Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_HndFreLatCtl_StAcv_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_HndFre_StHndDet1_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc Parameters CustFctIn_HndFreLatCtl_FlgIniExcDet CustFctIn_HndFreLatCtl_FlgErrQlfAcv CustFctIn_HndFreLatCtl_TurnOff Raw { "ID": "16660721", "ASIL": " QM", "Text": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361458", "Description": "Inputs \n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
193	18428534	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGr Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_HndFreLatCtl_StAcv_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_HndFre_StHndDet1_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc Parameters CustFctIn_HndFreLatCtl_FlgIniExcDet CustFctIn_HndFreLatCtl_FlgErrQlfAcv CustFctIn_HndFreLatCtl_TurnOff Raw { "ID": "18428534", "ASIL": " QM", "Text": "Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Inputs", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
194	42216570	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGr Inputs Signal-Values: CustFctIn_HndFreLatCtl_StAcv CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctIn_HndFreLatCtlCrvtCtl_FacSsty CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp CustFctIn_HndFre_StHndDet1 CustFctIn_HndFre_StHndDet2 CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd Signal-Classifier: CustFctIn_HndFreLatCtl_StAcv_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_HndFre_StHndDet1_sc CustFctIn_HndFre_StHndDet2_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc Parameters CustFctIn_HndFreLatCtl_FlgIniExcDet CustFctIn_HndFreLatCtl_FlgErrQlfAcv CustFctIn_HndFreLatCtl_TurnOff Raw { "ID": "42216570", "ASIL": " QM", "Text": "Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1\n_x000D_CustFctIn_HndFre_StHndDet2\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_CustFctIn_HndFre_StHndDet2_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff", "Type": "Pre Condition", "Status": "Released", "Summary": "Inputs", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Inputs\n_x000D_Signal-Values:\n_x000D_CustFctIn_HndFreLatCtl_StAcv\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctIn_HndFreCrvtCtl_CrvtDmdTiStamp\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1\n_x000D_CustFctIn_HndFre_StHndDet2\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd \n_x000D_ \n_x000D_Signal-Classifier:\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_ \n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_CustFctIn_HndFre_StHndDet2_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_ \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_ \n_x000D_Parameters \n_x000D_CustFctIn_HndFreLatCtl_FlgIniExcDet\n_x000D_CustFctIn_HndFreLatCtl_FlgErrQlfAcv\n_x000D_CustFctIn_HndFreLatCtl_TurnOff", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
195	16660722	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Outputs StAcv CustFctOut_HndFreLatCtl_StAcv CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv Outputs StAcv CustFctOut_HndFreLatCtl_StAcv CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv CustFctOut_HndFre_StHndDet1 All other Outputs CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctOut_HndFreLatCtlCrvtCtl_FacSsty CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd States CustFctOut_HndFre_StDiagEve CustFctOut_HndFre_StDiagEve_for_StVld Raw { "ID": "16660722", "ASIL": " QM", "Text": "Outputs\n_x000D_ \n_x000D_ \n_x000D_StAcv\n_x000D_CustFctOut_HndFreLatCtl_StAcv\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv\n_x000D_ \n_x000D_CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd\n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CustFctOut_HndFre_StDiagEve\n_x000D_CustFctOut_HndFre_StDiagEve_for_StVld", "Type": "Pre Condition", "Status": "Released", "Summary": "Outputs", "Relevant": "no", "column_12": "", "Foreign ID": "1361460", "Description": "Outputs\n_x000D_ \n_x000D_ \n_x000D_StAcv\n_x000D_CustFctOut_HndFreLatCtl_StAcv\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_FlgAcv\n_x000D_ \n_x000D_CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgDmd\n_x000D_CustFctOut_HndFreLatCtlSlipAgCtl_AgGrdDmd\n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CustFctOut_HndFre_StDiagEve\n_x000D_CustFctOut_HndFre_StDiagEve_for_StVld", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
196	42217815	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Outputs StAcv CustFctOut_HndFreLatCtl_StAcv CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp CustFctOut_HndFre_StHndDet1 All other O Outputs StAcv CustFctOut_HndFreLatCtl_StAcv CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp CustFctOut_HndFre_StHndDet1 All other Outputs CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd CustFctOut_HndFreLatCtlCrvtCtl_FacSsty CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd States CustFctOut_HndFre_StDiagEve CustFctOut_HndFre_StDiagEve_for_StVld Raw { "ID": "42217815", "ASIL": " QM", "Text": "Outputs\n_x000D_ \n_x000D_StAcv\n_x000D_CustFctOut_HndFreLatCtl_StAcv\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CustFctOut_HndFre_StDiagEve\n_x000D_CustFctOut_HndFre_StDiagEve_for_StVld", "Type": "Pre Condition", "Status": "Released", "Summary": "Outputs", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Outputs\n_x000D_ \n_x000D_StAcv\n_x000D_CustFctOut_HndFreLatCtl_StAcv\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FlgGrdExtp\n_x000D_ \n_x000D_CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_All other Outputs\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_CrvtGrdDmd\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_FacSsty\n_x000D_CustFctOut_HndFreLatCtlCrvtCtl_StLimCtlFReq\n_x000D_CustFctOut_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd\n_x000D_ \n_x000D_States\n_x000D_CustFctOut_HndFre_StDiagEve\n_x000D_CustFctOut_HndFre_StDiagEve_for_StVld", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
197	16660723	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Merged classifier of LatCtl and HndFre input signal classifiers (Note: The classifier information of all LatCtl and HndFre input Merged classifier of LatCtl and HndFre input signal classifiers (Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation) IF BitwiseOR: one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) CustFctIn_HndFreLatCtl_StAcv_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc CustFctIn_HndFre_StHndDet1_sc THEN: the corresponding Bits of the merged classifier (internal) shall be true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) ELSE: the corresponding Bits of the merged classifier (internal) shall be false (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) Raw { "ID": "16660723", "ASIL": " ASIL B", "Text": "Merged classifier of LatCtl and HndFre input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Type": "Pre Condition", "Status": "Released", "Summary": "", "Relevant": "no", "column_12": "", "Foreign ID": "1361461", "Description": "Merged classifier of LatCtl and HndFre input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
198	18429405	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Merged classifier of LatCtl and HndFre input signal classifiers (Note: The classifier information of all LatCtl and HndFre input Merged classifier of LatCtl and HndFre input signal classifiers (Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation) IF BitwiseOR: one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) CustFctIn_HndFreLatCtl_StAcv_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc CustFctIn_HndFre_StHndDet1_sc CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc THEN: the corresponding Bits of the merged classifier (internal) shall be true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) ELSE: the corresponding Bits of the merged classifier (internal) shall be false (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) Raw { "ID": "18429405", "ASIL": " ASIL B", "Text": "Merged classifier of LatCtl and HndFre input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Type": "Pre Condition", "Status": "Released", "Summary": "Merged classifier of LatCtl and HndFre input signal classifiers", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Merged classifier of LatCtl and HndFre input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc\n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgDmd_sc \n_x000D_CustFctIn_HndFreLatCtlSlipAgCtl_AgGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
199	42216989	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Merged classifier of LatCtl and HndFre input signal classifiers (Note: The classifier information of all LatCtl and HndFre input Merged classifier of LatCtl and HndFre input signal classifiers (Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation) IF BitwiseOR: one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) CustFctIn_HndFreLatCtl_StAcv_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc CustFctIn_HndFre_StHndDet1_sc CustFctIn_HndFre_StHndDet2_sc CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc VMMP_CFBACA_p_ACASVLatCtlErrRact_TrigClas THEN: the corresponding Bits of the merged classifier (internal) shall be true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) ELSE: the corresponding Bits of the merged classifier (internal) shall be false (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) Raw { "ID": "42216989", "ASIL": " ASIL B", "Text": "Merged classifier of LatCtl and HndFre input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_CustFctIn_HndFre_StHndDet2_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_VMMP_CFBACA_p_ACASVLatCtlErrRact_TrigClas\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Type": "Pre Condition", "Status": "Released", "Summary": "Merged classifier of LatCtl and HndFre input signal classifiers", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Merged classifier of LatCtl and HndFre input signal classifiers\n_x000D_(Note: The classifier information of all LatCtl and HndFre input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n_x000D_ \n_x000D_IF BitwiseOR: \n_x000D_one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_CustFctIn_HndFreLatCtl_StAcv_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_StLimCtlFReq_sc \n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc\n_x000D_CustFctIn_HndFre_StHndDet1_sc\n_x000D_CustFctIn_HndFre_StHndDet2_sc\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_ValCrc_sc\n_x000D_VMMP_CFBACA_p_ACASVLatCtlErrRact_TrigClas\n_x000D_THEN:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be true\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n_x000D_ELSE:\n_x000D_the corresponding Bits of the merged classifier (internal) shall be false\n_x000D_(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
200	42218602	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Calculation of output signal CustFctOut_HndFre_StHndDet1 IF [AND(1,2,3)]: 1) CustFctIn_HndFre_StHndDet1 is equal to VMMP_SINFCT Calculation of output signal CustFctOut_HndFre_StHndDet1 IF [AND(1,2,3)]: 1) CustFctIn_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff 2) CustFctIn_HndFre_StHndDet2 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn 3) VSOCH_s_FlgACAHF_Ena is true THEN: CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff ELSE: CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn Raw { "ID": "42218602", "ASIL": " ASIL B", "Text": "Calculation of output signal CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2,3)]: \n_x000D_1) CustFctIn_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_THEN: \n_x000D_CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_ELSE: \n_x000D_CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn", "Type": "Pre Condition", "Status": "Released", "Summary": "Calculation of output signal CustFctOut_HndFre_StHndDet1", "Relevant": "no", "column_12": "", "Foreign ID": "", "Description": "Calculation of output signal CustFctOut_HndFre_StHndDet1\n_x000D_ \n_x000D_\n_x000D_IF [AND(1,2,3)]: \n_x000D_1) CustFctIn_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_2) CustFctIn_HndFre_StHndDet2 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn\n_x000D_3) VSOCH_s_FlgACAHF_Ena is true\n_x000D_THEN: \n_x000D_CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOff\n_x000D_ELSE: \n_x000D_CustFctOut_HndFre_StHndDet1 is equal to VMMP_SINFCT_c_CusFctIn_HandsOn", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }
201	16660724	Pre Condition	Released	no	False	type_not_target, relevance_filtered	Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv IF: CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv IF: CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv THEN: CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq ELSEIF [AND(1,2)]: 1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv 2) Bit1 of BitwiseOR ( CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) is set THEN: CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq ELSE: CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv Raw { "ID": "16660724", "ASIL": " ASIL B", "Text": "Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]: \n_x000D_1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_2) Bit1 of BitwiseOR (\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc\n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) \n_x000D_is set \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv", "Type": "Pre Condition", "Status": "Released", "Summary": "Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv", "Relevant": "no", "column_12": "", "Foreign ID": "1361462", "Description": "Mapping and Neutral-Value-Handling of CustFctIn_HndFreLatCtl_StAcv\n_x000D_ \n_x000D_\n_x000D_IF: \n_x000D_CustFctIn_HndFreLatCtl_StAcv is not equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSEIF [AND(1,2)]: \n_x000D_1) CustFctIn_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n_x000D_2) Bit1 of BitwiseOR (\n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_CrvtGrdDmd_sc \n_x000D_CustFctIn_HndFreLatCtlCrvtCtl_FacSsty_sc\n_x000D_CustFctIn_HndFreLatCtlStgStiCtl_AgOffStgWhlDmd_sc) \n_x000D_is set \n_x000D_THEN: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_c_StReqCusFctNoReq\n_x000D_ \n_x000D_ELSE: \n_x000D_CustFctOut_HndFreLatCtl_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv", "Vehicle Launch": "", "Vehicle Platform": "E³ 1.2" }

Source files

Mapping profiles

Import history

VME-PROD-VehicleMotionManagement - VMMP_SINFCT_CFBACA.xlsx · source records

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