Source files

Short description

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The module CFBLIM (Customer Function Bridge Limiter) is part of the subfunction SINFCT.

It represents the docking station between VMM and the customer function LIM. Customer-specific parts are translated by the latter into a VMM-internal signal language and the interfaces are prepared.

Raw

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  "Text": "The module CFBLIM (Customer Function Bridge Limiter) is part of the subfunction SINFCT.\n\rIt represents the docking station between VMM and the customer function LIM. Customer-specific parts are translated by the latter into a VMM-internal signal language and the interfaces are prepared.",
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  "Status": "",
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  "Foreign ID": "1339674.0",
  "Description": "The module CFBLIM (Customer Function Bridge Limiter) is part of the subfunction SINFCT.\n\rIt represents the docking station between VMM and the customer function LIM. Customer-specific parts are translated by the latter into a VMM-internal signal language and the interfaces are prepared.",
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Interface description

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The valid version of the signal and parameter files for the relevant SWRS are:

Raw

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  "Text": "The valid version of the signal and parameter files for the relevant SWRS are:",
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The valid versions of the signals and parameter files to be find in SWRS SWC_VMMP (SWRS_Id : Chapter 2 "Interface description"

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  "Text": "The valid versions of the signals and parameter files to be find in SWRS SWC_VMMP (SWRS_Id No InterWiki reference defined in properties for 'mks'): Chapter 2 \"Interface description\"",
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The valid version of the signal and parameter files for test basis to be find in CG, which to be tested

Raw

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  "Text": "The valid version of the signal and parameter files for test basis to be find in CG, which to be tested",
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Presetting/Framework/Definitions

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Traceability

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SWRS to Testcase:

The latest revision of the test specification document is valid for the tracability SWRS to Testcase

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SWRS to DOORS: 

DOORS-IDs are mentioned in the SWRS atrribute DOORS IDs.

The latest baseline of the specification document (DOORS) is valid for the traceability SWRS to DOORS.

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  "Description": "SWRS to DOORS: \n\rDOORS-IDs are mentioned in the SWRS atrribute DOORS IDs.\n\rThe latest baseline of the specification document (DOORS) is valid for the traceability SWRS to DOORS.",
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Toolchain

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The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain.

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  "Text": "The Matlab/Simulink/TargetLink versions have to be used according to the HCP1-Toolchain.",
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  "Relevant": "no",
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For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used.

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  "Text": "For modeling in Simulink the valid EnProVe catalogue of guidelines has to be used.",
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Bit numbering

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The bit numbering takes place as zero-based numbering method. 

This means, 1 Byte is equal to Bit 0...7.

Raw

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  "Text": "The bit numbering takes place as zero-based numbering method. \n\rThis means, 1 Byte is equal to Bit 0...7.",
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  "Summary": "",
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  "Foreign ID": "1339701.0",
  "Description": "The bit numbering takes place as zero-based numbering method. \n\rThis means, 1 Byte is equal to Bit 0...7.",
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Tolerances

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For the comparison of output signals to the expected reactions or by back-to-back tests (MiL-PiL) following tolerances are accepted for deviations:

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  "Text": "For the comparison of output signals to the expected reactions or by back-to-back tests (MiL-PiL) following tolerances are accepted for deviations:",
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Bool: No deviation allowed

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UInt, Int: No deviation allowed

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Float: 0.1% related to the permissible value range of the signal

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It must be ensured that an output reaction occurs due to an event at the input within the same calculation step.

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Linked Constants

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Linked constants (defined in SPE) need not to be manipulated during the test. If condition describes different value for linked constant as defined in SPE, test needs not to be performed.

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  "Summary": "",
  "Relevant": "no",
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Properties of Inputsignals

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Set Signal Classifier Bit consistent with Signal Value:

Note: Value (LIM_s_LgtLimA_MdTarDyn) and Classifier (LIM_sc_LgtLimA_MdTarDyn) must not be stimulated independently!

IF:

LIM_s_LgtLimA_MdTarDyn = 2

THEN:

Classifier Bit3 (FlgIni) of LIM_sc_LgtLimA_MdTarDyn has to be set to True

ELSEIF:

LIM_s_LgtLimA_MdTarDyn = 3

THEN:

Classifier Bit2 (FlgErrQlf) of LIM_sc_LgtLimA_MdTarDyn has to be set to True

ELSE:

LIM_sc_LgtLimA_MdTarDyn could be set to any value within the valid signal range

Raw

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Generic Conditions and Requirements (Service Bridges)

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The customer function brigde CFBLIM consists of the generic Service Bridge of LgtLimA-Service. Every Service Bridge requires the generic Signalmonitoring.

The Pre Conditions and Functional Requirements of Signalmonitoring and the generic Service Bridges are shared from SWRS_VMMP_SINFCT_CFB_Services (62127779) into this document.

Specific Pre Conditions and Functional Requirements that are just required for CFBLIM are defined in this document.

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Signalmonitoring

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The Signalmonitoring calculates *StDiagEve based on the merged classifier information, the RangeCheck result, the parameter *TurnOff and the constants *FlgIniExcDet and *FlgErrQlfAcv.

*StDiagEve is the result of the input signal monitoring.

Note: If the Signalmonitoring is used for different services with different ASIL-levels, then the highest ASIL is set in the SWRS document (attribute: ASIL level).

Note: The following linked by name keyword describe two states of an internal boolean information:

* Error qualified

* Error not qualified

* internal error qualification is available

* internal error qualification is NOT available

* Initialization qualified

* Initialization not qualified

* internal initialization qualification is available

* internal initialization qualification is NOT available

Note:

The following functional requirements for case description do not need an Else-Path because general Else-Path is not useful. It is not possible that no case is set. At least one of the following cases will be set. If more than one case is set at the same time, prioritization will be used.

* 

 Valid Case: No errors

* 

 Case: Service bridge is deactivated

* 

 Case: Signal not configured (Bit0)

* 

 Case: Monitoring is not activ (Bit5)

* 

 Case: Initialization unqualified (Bit3 not longer than 500 ms)

* 

 Case: Initialization qualified (Bit3 longer than 500 ms)

* 

 Case: Error (Bit2)

* 

 Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)

* 

 Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)

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The classifier signal consists of 1 Byte (Bit0 to Bit7). The classifier information of the input signals are merged to one internal classifier by BitwiseOR-operation (merged classifier).

Bit information:

** Bit0 (FlgSigNotConf)

** Bit1 (FlgValCod - Neutral value)

** Bit2 (FlgErrQlf)

** Bit3 (FlgIni)

** Bit4 (not used)

** Bit5 (FlgMonNotAcv)

** Bit6 (not used)

** Bit7 (FlgErrCur)

Raw

{
  "ID": "16665414.0",
  "ASIL": "  ",
  "Text": "The classifier signal consists of 1 Byte (Bit0 to Bit7). The classifier information of the input signals are merged to one internal classifier by BitwiseOR-operation (merged classifier).\n\rBit information:\n\r** Bit0 (FlgSigNotConf)\n\r** Bit1 (FlgValCod - Neutral value)\n\r** Bit2 (FlgErrQlf)\n\r** Bit3 (FlgIni)\n\r** Bit4 (not used)\n\r** Bit5 (FlgMonNotAcv)\n\r** Bit6 (not used)\n\r** Bit7 (FlgErrCur)",
  "Type": "Information",
  "Status": "",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356407.0",
  "Description": "The classifier signal consists of 1 Byte (Bit0 to Bit7). The classifier information of the input signals are merged to one internal classifier by BitwiseOR-operation (merged classifier).\n\rBit information:\n\r** Bit0 (FlgSigNotConf)\n\r** Bit1 (FlgValCod - Neutral value)\n\r** Bit2 (FlgErrQlf)\n\r** Bit3 (FlgIni)\n\r** Bit4 (not used)\n\r** Bit5 (FlgMonNotAcv)\n\r** Bit6 (not used)\n\r** Bit7 (FlgErrCur)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

If more than one of the following cases of *StDiagEve output signal are set at the same time and therefore different values for *StDiagEve are requested, then only the value (VMMP_c_DiagEveSigDi, VMMP_c_DiagEveSigNotVld, VMMP_c_DiagEveSigFail, VMMP_c_DiagEveSigIni, VMMP_c_DiagEveSigSusp, VMMP_c_DiagEveSigNone) with highest priority shall be assigned to the output signal *StDiagEve.

The prioritization is done according to the following order:

- prio 1 > prio 2 > prio 3 > prio 4 > prio 5 > prio 6

Raw

{
  "ID": "16665415.0",
  "ASIL": "  ",
  "Text": "If more than one of the following cases of *StDiagEve output signal are set at the same time and therefore different values for *StDiagEve are requested, then only the value (VMMP_c_DiagEveSigDi, VMMP_c_DiagEveSigNotVld, VMMP_c_DiagEveSigFail, VMMP_c_DiagEveSigIni, VMMP_c_DiagEveSigSusp, VMMP_c_DiagEveSigNone) with highest priority shall be assigned to the output signal *StDiagEve.\n\r \n\rThe prioritization is done according to the following order:\n\r- prio 1 > prio 2 > prio 3 > prio 4 > prio 5 > prio 6",
  "Type": "Information",
  "Status": "",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1417895.0",
  "Description": "If more than one of the following cases of *StDiagEve output signal are set at the same time and therefore different values for *StDiagEve are requested, then only the value (VMMP_c_DiagEveSigDi, VMMP_c_DiagEveSigNotVld, VMMP_c_DiagEveSigFail, VMMP_c_DiagEveSigIni, VMMP_c_DiagEveSigSusp, VMMP_c_DiagEveSigNone) with highest priority shall be assigned to the output signal *StDiagEve.\n\r \n\rThe prioritization is done according to the following order:\n\r- prio 1 > prio 2 > prio 3 > prio 4 > prio 5 > prio 6",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Availability of internal error qualification in signal monitoring

Initial state of error qualification:

Error not qualified

IF [AND(1,2,3,4,5)]: 

1) *TurnOff = false

2) Bit0 (FlgSigNotConf) of merged classifier is NOT set

3) Bit5 (FlgMonNotAcv) of merged classifier is NOT set

4) (VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started

5) *FlgErrQlfAcv = true

THEN:

internal error qualification shall be available (internal error qualification is available)

ELSE: 

internal error qualification shall not be available (internal error qualification is NOT available)

Note: "(VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started" means, that error qualification is not available within the first time steps after module has started the execution. The number of time steps in which error qualification is not available is defined by the time "VMMP_c_TDiagStart" multiplied by the sample frequency "VMMP_c_FrqSmpl".

Raw

{
  "ID": "16665416.0",
  "ASIL": "  QM",
  "Text": "Availability of internal error qualification in signal monitoring\n\rInitial state of error qualification:\n\rError not qualified\n\rIF [AND(1,2,3,4,5)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is NOT set\n\r3) Bit5 (FlgMonNotAcv) of merged classifier is NOT set\n\r4) (VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\n\r5) *FlgErrQlfAcv = true\n\rTHEN:\n\rinternal error qualification shall be available (internal error qualification is available)\n\rELSE: \n\rinternal error qualification shall not be available (internal error qualification is NOT available)\n\r \n\rNote: \"(VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\" means, that error qualification is not available within the first time steps after module has started the execution. The number of time steps in which error qualification is not available is defined by the time \"VMMP_c_TDiagStart\" multiplied by the sample frequency \"VMMP_c_FrqSmpl\".",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356421.0",
  "Description": "Availability of internal error qualification in signal monitoring\n\rInitial state of error qualification:\n\rError not qualified\n\rIF [AND(1,2,3,4,5)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is NOT set\n\r3) Bit5 (FlgMonNotAcv) of merged classifier is NOT set\n\r4) (VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\n\r5) *FlgErrQlfAcv = true\n\rTHEN:\n\rinternal error qualification shall be available (internal error qualification is available)\n\rELSE: \n\rinternal error qualification shall not be available (internal error qualification is NOT available)\n\r \n\rNote: \"(VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\" means, that error qualification is not available within the first time steps after module has started the execution. The number of time steps in which error qualification is not available is defined by the time \"VMMP_c_TDiagStart\" multiplied by the sample frequency \"VMMP_c_FrqSmpl\".",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Error qualification

This PreCondition is relevant if:

Error not qualified

IF [AND(1,2)]:

1) unqualified Error (Signal range is invalid OR Bit7 (FlgErrCur) of merged classifier is set) is true for 500 ms after internal error qualification is available

2) internal error qualification is available

THEN:

Error shall be qualified (Error qualified)

ELSE:

Error shall not be qualified (Error not qualified)

Note: There are two kinds of unqualified errors:

* 

 Signal range is invalid defined by RangeCheck

* Bit7 (FlgErrCur) of merged classifier is set

If at least one kind of unqualified error is true, the resulting unqualified error shall be true.

Raw

{
  "ID": "16665417.0",
  "ASIL": "  QM",
  "Text": "Error qualification\n\rThis PreCondition is relevant if:\n\rError not qualified\n\r \n\rIF [AND(1,2)]:\n\r1) unqualified Error (Signal range is invalid OR Bit7 (FlgErrCur) of merged classifier is set) is true for 500 ms after internal error qualification is available\n\r2) internal error qualification is available\n\rTHEN:\n\rError shall be qualified (Error qualified)\n\rELSE:\n\rError shall not be qualified (Error not qualified)\n\r \n\rNote: There are two kinds of unqualified errors:\n\r* \n\r \n\r Signal range is invalid defined by RangeCheck\n\r* Bit7 (FlgErrCur) of merged classifier is set\n\rIf at least one kind of unqualified error is true, the resulting unqualified error shall be true.",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356419.0",
  "Description": "Error qualification\n\rThis PreCondition is relevant if:\n\rError not qualified\n\r \n\rIF [AND(1,2)]:\n\r1) unqualified Error (Signal range is invalid OR Bit7 (FlgErrCur) of merged classifier is set) is true for 500 ms after internal error qualification is available\n\r2) internal error qualification is available\n\rTHEN:\n\rError shall be qualified (Error qualified)\n\rELSE:\n\rError shall not be qualified (Error not qualified)\n\r \n\rNote: There are two kinds of unqualified errors:\n\r* \n\r \n\r Signal range is invalid defined by RangeCheck\n\r* Bit7 (FlgErrCur) of merged classifier is set\n\rIf at least one kind of unqualified error is true, the resulting unqualified error shall be true.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Error dequalification

This PreCondition is relevant if:

Error qualified

IF:

unqualified Error is false for 1010 ms

THEN:

Error shall be dequalified (Error not qualified)

ELSE:

Error shall be qualified (Error qualified)

Raw

{
  "ID": "16665418.0",
  "ASIL": "  QM",
  "Text": "Error dequalification\n\rThis PreCondition is relevant if:\n\rError qualified\n\rIF:\n\runqualified Error is false for 1010 ms\n\rTHEN:\n\rError shall be dequalified (Error not qualified)\n\rELSE:\n\rError shall be qualified (Error qualified)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356406.0",
  "Description": "Error dequalification\n\rThis PreCondition is relevant if:\n\rError qualified\n\rIF:\n\runqualified Error is false for 1010 ms\n\rTHEN:\n\rError shall be dequalified (Error not qualified)\n\rELSE:\n\rError shall be qualified (Error qualified)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Availability of internal initialization qualification in signal monitoring

Initial state of initialization qualification:

Initialization not qualified

IF [AND(1,2,3,4,5)]: 

1) *TurnOff = false

2) Bit0 (FlgSigNotConf) of merged classifier is NOT set

3) Bit5 (FlgMonNotAcv) of merged classifier is NOT set

4) (VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started

5) *FlgIniExcDet = true

THEN:

internal initialization qualification shall be available (internal initialization qualification is available)

ELSE: 

internal initialization qualification shall not be available (internal initialization qualification is NOT available)

Note: "(VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started" means, that initialization qualification is not available within the first time steps after module has started the execution. The number of time steps in which initialization qualification is not available is defined by the time "VMMP_c_TDiagStart" multiplied by the sample frequency "VMMP_c_FrqSmpl".

Raw

{
  "ID": "16665419.0",
  "ASIL": "  QM",
  "Text": "Availability of internal initialization qualification in signal monitoring\n\rInitial state of initialization qualification:\n\rInitialization not qualified\n\rIF [AND(1,2,3,4,5)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is NOT set\n\r3) Bit5 (FlgMonNotAcv) of merged classifier is NOT set\n\r4) (VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\n\r5) *FlgIniExcDet = true\n\rTHEN:\n\rinternal initialization qualification shall be available (internal initialization qualification is available)\n\rELSE: \n\rinternal initialization qualification shall not be available (internal initialization qualification is NOT available)\n\r \n\r\n\rNote: \"(VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\" means, that initialization qualification is not available within the first time steps after module has started the execution. The number of time steps in which initialization qualification is not available is defined by the time \"VMMP_c_TDiagStart\" multiplied by the sample frequency \"VMMP_c_FrqSmpl\".",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356422.0",
  "Description": "Availability of internal initialization qualification in signal monitoring\n\rInitial state of initialization qualification:\n\rInitialization not qualified\n\rIF [AND(1,2,3,4,5)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is NOT set\n\r3) Bit5 (FlgMonNotAcv) of merged classifier is NOT set\n\r4) (VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\n\r5) *FlgIniExcDet = true\n\rTHEN:\n\rinternal initialization qualification shall be available (internal initialization qualification is available)\n\rELSE: \n\rinternal initialization qualification shall not be available (internal initialization qualification is NOT available)\n\r \n\r\n\rNote: \"(VMMP_c_TDiagStart * VMMP_c_FrqSmpl) time steps are over after module execution has been started\" means, that initialization qualification is not available within the first time steps after module has started the execution. The number of time steps in which initialization qualification is not available is defined by the time \"VMMP_c_TDiagStart\" multiplied by the sample frequency \"VMMP_c_FrqSmpl\".",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Initialization qualification

This PreCondition is relevant if:

Initialization not qualified

If Signalmonitoring is applied for the ServiceBridges LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim or ScndCllsnMtgtn, the following condition shall be used:

IF [AND(1,2)]:

1) after internal initialization qualification is available unqualified Bit3 (FlgIni) of merged classifier is true for 500 ms

2) internal initialization qualification is available

THEN:

Initialization shall be qualified (Initialization qualified)

ELSE:

Initialization shall not be qualified (Initialization not qualified)

Note: The initialization qualification time for PrkLockCtl Service Bridge is different to all other Service Bridges ( LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim, ScndCllsnMtgtn).

Raw

{
  "ID": "16665420.0",
  "ASIL": "  QM",
  "Text": "Initialization qualification\n\rThis PreCondition is relevant if:\n\rInitialization not qualified\n\r \n\rIf Signalmonitoring is applied for the ServiceBridges LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim or ScndCllsnMtgtn, the following condition shall be used:\n\rIF [AND(1,2)]:\n\r1) after internal initialization qualification is available unqualified Bit3 (FlgIni) of merged classifier is true for 500 ms\n\r2) internal initialization qualification is available\n\rTHEN:\n\rInitialization shall be qualified (Initialization qualified)\n\rELSE:\n\rInitialization shall not be qualified (Initialization not qualified)\n\r \n\rNote: The initialization qualification time for PrkLockCtl Service Bridge is different to all other Service Bridges ( LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim, ScndCllsnMtgtn).",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356420.0",
  "Description": "Initialization qualification\n\rThis PreCondition is relevant if:\n\rInitialization not qualified\n\r \n\rIf Signalmonitoring is applied for the ServiceBridges LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim or ScndCllsnMtgtn, the following condition shall be used:\n\rIF [AND(1,2)]:\n\r1) after internal initialization qualification is available unqualified Bit3 (FlgIni) of merged classifier is true for 500 ms\n\r2) internal initialization qualification is available\n\rTHEN:\n\rInitialization shall be qualified (Initialization qualified)\n\rELSE:\n\rInitialization shall not be qualified (Initialization not qualified)\n\r \n\rNote: The initialization qualification time for PrkLockCtl Service Bridge is different to all other Service Bridges ( LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim, ScndCllsnMtgtn).",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Initialization dequalification

This PreCondition is relevant if:

Initialization qualified

If Signalmonitoring is applied for the ServiceBridges LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim or ScndCllsnMtgtn, the following condition shall be used:

IF:

unqualified Bit3 (FlgIni) of merged classifier is false for 1010 ms

THEN:

Initialization shall be dequalified (Initialization not qualified)

ELSE:

Initialization shall be qualified (Initialization qualified)

Note: The initialization dequalification time for PrkLockCtl Service Bridge is different to all other Service Bridges ( LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim, ScndCllsnMtgtn).

Raw

{
  "ID": "16665421.0",
  "ASIL": "  QM",
  "Text": "Initialization dequalification\n\rThis PreCondition is relevant if:\n\rInitialization qualified\n\r \n\rIf Signalmonitoring is applied for the ServiceBridges LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim or ScndCllsnMtgtn, the following condition shall be used:\n\rIF:\n\runqualified Bit3 (FlgIni) of merged classifier is false for 1010 ms\n\rTHEN:\n\rInitialization shall be dequalified (Initialization not qualified)\n\rELSE:\n\rInitialization shall be qualified (Initialization qualified)\n\r \n\rNote: The initialization dequalification time for PrkLockCtl Service Bridge is different to all other Service Bridges ( LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim, ScndCllsnMtgtn).",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356416.0",
  "Description": "Initialization dequalification\n\rThis PreCondition is relevant if:\n\rInitialization qualified\n\r \n\rIf Signalmonitoring is applied for the ServiceBridges LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim or ScndCllsnMtgtn, the following condition shall be used:\n\rIF:\n\runqualified Bit3 (FlgIni) of merged classifier is false for 1010 ms\n\rTHEN:\n\rInitialization shall be dequalified (Initialization not qualified)\n\rELSE:\n\rInitialization shall be qualified (Initialization qualified)\n\r \n\rNote: The initialization dequalification time for PrkLockCtl Service Bridge is different to all other Service Bridges ( LgtCtl, LatCtl, WarnBrk, StgWhlVib, LgtLimA, LgtLimV, HldCtl, PrkCtlAly, PrkCtlRls, PreCdn, HydBrkAsi, LgtDir, StAcvFct, FailSafeStop, TrjCtl, CrvtLim, ScndCllsnMtgtn).",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Prioritization of *StDiagEve

Note: It is possible, that two or more of the following cases are true at the same time:

* Case: Service bridge is deactivated

* Case: Signal not configured (Bit0)

* Case: Monitoring is not activ (Bit5)

* Case: Initialization unqualified (Bit3 not longer than 500 ms)

* Case: Initialization qualified (Bit3 longer than 500 ms)

* Case: Error (Bit2)

* Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)

* Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)

Therefore different values shall be assigned to the signal *StDiagEve. But *StDiagEve shall always take just one value. Therefore the following prioritization shall be applied. The prioritization depends on whether error shall be qualified or error shall not be qualified.

IF: 

Error shall be qualified (Error qualified)

THEN :

- VMMP_c_DiagEveSigDi = prio 1

- VMMP_c_DiagEveSigNotVld = prio 2 

- VMMP_c_DiagEveSigFail = prio 3 

- VMMP_c_DiagEveSigIni = prio 4

- VMMP_c_DiagEveSigSusp = prio 5 

- VMMP_c_DiagEveSigNone = prio 6

ELSE :

- VMMP_c_DiagEveSigDi = prio 1

- VMMP_c_DiagEveSigFail = prio 2 

- VMMP_c_DiagEveSigNotVld = prio 3 

- VMMP_c_DiagEveSigIni = prio 4

- VMMP_c_DiagEveSigSusp = prio 5 

- VMMP_c_DiagEveSigNone = prio 6

Raw

{
  "ID": "16665422.0",
  "ASIL": "  QM",
  "Text": "Prioritization of *StDiagEve\n\rNote: It is possible, that two or more of the following cases are true at the same time:\n\r* Case: Service bridge is deactivated\n\r* Case: Signal not configured (Bit0)\n\r* Case: Monitoring is not activ (Bit5)\n\r* Case: Initialization unqualified (Bit3 not longer than 500 ms)\n\r* Case: Initialization qualified (Bit3 longer than 500 ms)\n\r* Case: Error (Bit2)\n\r* Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)\n\r* Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)\n\rTherefore different values shall be assigned to the signal *StDiagEve. But *StDiagEve shall always take just one value. Therefore the following prioritization shall be applied. The prioritization depends on whether error shall be qualified or error shall not be qualified.\n\r \n\rIF: \n\rError shall be qualified (Error qualified)\n\rTHEN :\n\r- VMMP_c_DiagEveSigDi = prio 1\n\r- VMMP_c_DiagEveSigNotVld = prio 2 \n\r- VMMP_c_DiagEveSigFail = prio 3 \n\r- VMMP_c_DiagEveSigIni = prio 4\n\r- VMMP_c_DiagEveSigSusp = prio 5 \n\r- VMMP_c_DiagEveSigNone = prio 6\n\rELSE :\n\r- VMMP_c_DiagEveSigDi = prio 1\n\r- VMMP_c_DiagEveSigFail = prio 2 \n\r- VMMP_c_DiagEveSigNotVld = prio 3 \n\r- VMMP_c_DiagEveSigIni = prio 4\n\r- VMMP_c_DiagEveSigSusp = prio 5 \n\r- VMMP_c_DiagEveSigNone = prio 6",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356418.0",
  "Description": "Prioritization of *StDiagEve\n\rNote: It is possible, that two or more of the following cases are true at the same time:\n\r* Case: Service bridge is deactivated\n\r* Case: Signal not configured (Bit0)\n\r* Case: Monitoring is not activ (Bit5)\n\r* Case: Initialization unqualified (Bit3 not longer than 500 ms)\n\r* Case: Initialization qualified (Bit3 longer than 500 ms)\n\r* Case: Error (Bit2)\n\r* Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)\n\r* Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)\n\rTherefore different values shall be assigned to the signal *StDiagEve. But *StDiagEve shall always take just one value. Therefore the following prioritization shall be applied. The prioritization depends on whether error shall be qualified or error shall not be qualified.\n\r \n\rIF: \n\rError shall be qualified (Error qualified)\n\rTHEN :\n\r- VMMP_c_DiagEveSigDi = prio 1\n\r- VMMP_c_DiagEveSigNotVld = prio 2 \n\r- VMMP_c_DiagEveSigFail = prio 3 \n\r- VMMP_c_DiagEveSigIni = prio 4\n\r- VMMP_c_DiagEveSigSusp = prio 5 \n\r- VMMP_c_DiagEveSigNone = prio 6\n\rELSE :\n\r- VMMP_c_DiagEveSigDi = prio 1\n\r- VMMP_c_DiagEveSigFail = prio 2 \n\r- VMMP_c_DiagEveSigNotVld = prio 3 \n\r- VMMP_c_DiagEveSigIni = prio 4\n\r- VMMP_c_DiagEveSigSusp = prio 5 \n\r- VMMP_c_DiagEveSigNone = prio 6",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Valid Case: No errors

IF [AND(1,2,3,4,5,6,7)]: 

1) *TurnOff = false

2) Bit0 (FlgSigNotConf) of merged classifier is NOT set

3) Bit2 (FlgErrQlf) of merged classifier is NOT set

4) Bit3 (FlgIni) of merged classifier is NOT set

5) Bit5 (FlgMonNotAcv) of merged classifier is NOT set

6) Bit7 (FlgErrCur) of merged classifier is NOT set

7) Signal range is valid

THEN: 

*StDiagEve = VMMP_c_DiagEveSigNone

Raw

{
  "ID": "16665423.0",
  "ASIL": "  QM",
  "Text": "Valid Case: No errors\n\rIF [AND(1,2,3,4,5,6,7)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is NOT set\n\r3) Bit2 (FlgErrQlf) of merged classifier is NOT set\n\r4) Bit3 (FlgIni) of merged classifier is NOT set\n\r5) Bit5 (FlgMonNotAcv) of merged classifier is NOT set\n\r6) Bit7 (FlgErrCur) of merged classifier is NOT set\n\r7) Signal range is valid\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigNone",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356409.0",
  "Description": "Valid Case: No errors\n\rIF [AND(1,2,3,4,5,6,7)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is NOT set\n\r3) Bit2 (FlgErrQlf) of merged classifier is NOT set\n\r4) Bit3 (FlgIni) of merged classifier is NOT set\n\r5) Bit5 (FlgMonNotAcv) of merged classifier is NOT set\n\r6) Bit7 (FlgErrCur) of merged classifier is NOT set\n\r7) Signal range is valid\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigNone",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Service bridge is deactivated

IF: 

*TurnOff = true

THEN:

*StDiagEve = VMMP_c_DiagEveSigDi

Raw

{
  "ID": "16665424.0",
  "ASIL": "  QM",
  "Text": "Case: Service bridge is deactivated\n\r \n\r\n\rIF: \n\r*TurnOff = true\n\rTHEN:\n\r*StDiagEve = VMMP_c_DiagEveSigDi",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356412.0",
  "Description": "Case: Service bridge is deactivated\n\r \n\r\n\rIF: \n\r*TurnOff = true\n\rTHEN:\n\r*StDiagEve = VMMP_c_DiagEveSigDi",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Signal not configured (Bit0)

IF [AND(1,2)]: 

1) *TurnOff = false

2) Bit0 (FlgSigNotConf) of merged classifier is set

THEN: 

*StDiagEve = VMMP_c_DiagEveSigDi

Raw

{
  "ID": "16665425.0",
  "ASIL": "  QM",
  "Text": "Case: Signal not configured (Bit0)\n\r \n\rIF [AND(1,2)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is set\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigDi",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356410.0",
  "Description": "Case: Signal not configured (Bit0)\n\r \n\rIF [AND(1,2)]: \n\r1) *TurnOff = false\n\r2) Bit0 (FlgSigNotConf) of merged classifier is set\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigDi",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Monitoring is not activ (Bit5)

IF [AND(1,2)]: 

1) *TurnOff = false

2) Bit5 (FlgMonNotAcv) of merged classifier is set

THEN: 

*StDiagEve = VMMP_c_DiagEveSigIni

Raw

{
  "ID": "16665426.0",
  "ASIL": "  QM",
  "Text": "Case: Monitoring is not activ (Bit5)\n\r \n\rIF [AND(1,2)]: \n\r1) *TurnOff = false\n\r2) Bit5 (FlgMonNotAcv) of merged classifier is set\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigIni",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356423.0",
  "Description": "Case: Monitoring is not activ (Bit5)\n\r \n\rIF [AND(1,2)]: \n\r1) *TurnOff = false\n\r2) Bit5 (FlgMonNotAcv) of merged classifier is set\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigIni",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Initialization unqualified (Bit3 not longer than 500 ms)

IF [AND(1,2,3)]: 

1) *TurnOff = false

2) Bit3 (FlgIni) of merged classifier is set

3) Bit3 (FlgIni) of merged classifier is NOT qualified (Initialization not qualified)

THEN: 

*StDiagEve = VMMP_c_DiagEveSigIni

Raw

{
  "ID": "16665427.0",
  "ASIL": "  QM",
  "Text": "Case: Initialization unqualified (Bit3 not longer than 500 ms)\n\rIF [AND(1,2,3)]: \n\r1) *TurnOff = false\n\r2) Bit3 (FlgIni) of merged classifier is set\n\r3) Bit3 (FlgIni) of merged classifier is NOT qualified (Initialization not qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigIni",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356408.0",
  "Description": "Case: Initialization unqualified (Bit3 not longer than 500 ms)\n\rIF [AND(1,2,3)]: \n\r1) *TurnOff = false\n\r2) Bit3 (FlgIni) of merged classifier is set\n\r3) Bit3 (FlgIni) of merged classifier is NOT qualified (Initialization not qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigIni",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Initialization qualified (Bit3 longer than 500 ms)

IF [AND(1,2,3)]: 

1) *TurnOff = false

2) Bit3 (FlgIni) of merged classifier is set

3) Bit3 (FlgIni) of merged classifier is qualified (Initialization qualified)

THEN: 

*StDiagEve = VMMP_c_DiagEveSigNotVld

Raw

{
  "ID": "16665428.0",
  "ASIL": "  QM",
  "Text": "Case: Initialization qualified (Bit3 longer than 500 ms)\n\r \n\rIF [AND(1,2,3)]: \n\r1) *TurnOff = false\n\r2) Bit3 (FlgIni) of merged classifier is set\n\r3) Bit3 (FlgIni) of merged classifier is qualified (Initialization qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigNotVld",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356417.0",
  "Description": "Case: Initialization qualified (Bit3 longer than 500 ms)\n\r \n\rIF [AND(1,2,3)]: \n\r1) *TurnOff = false\n\r2) Bit3 (FlgIni) of merged classifier is set\n\r3) Bit3 (FlgIni) of merged classifier is qualified (Initialization qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigNotVld",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Error (Bit2)

IF [AND(1,2)]: 

1) *TurnOff = false

2) Bit2 (FlgErrQlf) of merged classifier is set

THEN: 

*StDiagEve = VMMP_c_DiagEveSigFail

Raw

{
  "ID": "16665429.0",
  "ASIL": "  QM",
  "Text": "Case: Error (Bit2)\n\rIF [AND(1,2)]: \n\r1) *TurnOff = false\n\r2) Bit2 (FlgErrQlf) of merged classifier is set\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigFail",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356415.0",
  "Description": "Case: Error (Bit2)\n\rIF [AND(1,2)]: \n\r1) *TurnOff = false\n\r2) Bit2 (FlgErrQlf) of merged classifier is set\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigFail",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)

IF [AND(1,OR(2,3),4,5]: 

1) *TurnOff = false

2) Bit7 (FlgErrCur) of merged classifier is set

3) Signal range is invalid

4) Bit7 (FlgErrCur) of merged classifier is set but NOT qualified (Error not qualified)

5) Signal range is invalid but NOT qualified (Error not qualified)

THEN: 

*StDiagEve = VMMP_c_DiagEveSigSusp

Raw

{
  "ID": "16665430.0",
  "ASIL": "  QM",
  "Text": "Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)\n\r \n\rIF [AND(1,OR(2,3),4,5]: \n\r1) *TurnOff = false\n\r2) Bit7 (FlgErrCur) of merged classifier is set\n\r3) Signal range is invalid\n\r4) Bit7 (FlgErrCur) of merged classifier is set but NOT qualified (Error not qualified)\n\r5) Signal range is invalid but NOT qualified (Error not qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigSusp",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356403.0",
  "Description": "Case: Suspicious, unqualified error (Bit7 or invalid signal range not longer than 500 ms)\n\r \n\rIF [AND(1,OR(2,3),4,5]: \n\r1) *TurnOff = false\n\r2) Bit7 (FlgErrCur) of merged classifier is set\n\r3) Signal range is invalid\n\r4) Bit7 (FlgErrCur) of merged classifier is set but NOT qualified (Error not qualified)\n\r5) Signal range is invalid but NOT qualified (Error not qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigSusp",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)

IF [AND(1,OR(2,3)]: 

1) *TurnOff = false

2) Bit7 (FlgErrCur) of merged classifier is set and qualified (Error qualified)

3) Signal range is invalid and qualified (Error qualified)

THEN: 

*StDiagEve = VMMP_c_DiagEveSigNotVld

Raw

{
  "ID": "16665431.0",
  "ASIL": "  QM",
  "Text": "Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)\n\r \n\rIF [AND(1,OR(2,3)]: \n\r1) *TurnOff = false\n\r2) Bit7 (FlgErrCur) of merged classifier is set and qualified (Error qualified)\n\r3) Signal range is invalid and qualified (Error qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigNotVld",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356405.0",
  "Description": "Case: Not valid, qualified error (Bit7 or invalid signal range longer than 500 ms)\n\r \n\rIF [AND(1,OR(2,3)]: \n\r1) *TurnOff = false\n\r2) Bit7 (FlgErrCur) of merged classifier is set and qualified (Error qualified)\n\r3) Signal range is invalid and qualified (Error qualified)\n\rTHEN: \n\r*StDiagEve = VMMP_c_DiagEveSigNotVld",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

LgtLimA Service Bridge (generic)

Raw

{
  "ID": "16665432.0",
  "ASIL": "  ",
  "Text": "LgtLimA Service Bridge (generic)",
  "Type": "Folder",
  "Status": "",
  "Summary": "LgtLimA Service Bridge (generic)",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356484.0",
  "Description": "",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Inputs

Signal-Values:

CustFctIn_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar 

CustFctIn_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA_ATlrHiTar 

CustFctIn_LgtLimA_ATlrHiDyn 

CustFctIn_LgtLimA_MdTarDyn 

Signal-Classifier:

CustFctIn_LgtLimA_StAcv_sc 

CustFctIn_LgtLimA_ADmd_sc 

CustFctIn_LgtLimA_APredTar_sc 

CustFctIn_LgtLimA_AGrdMaxDec_sc 

CustFctIn_LgtLimA_AGrdMaxInc_sc 

CustFctIn_LgtLimA_ATlrHiTar_sc 

CustFctIn_LgtLimA_ATlrHiDyn_sc 

CustFctIn_LgtLimA_MdTarDyn_sc 

Parameters 

CustFctIn_LgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff

Raw

{
  "ID": "16665433.0",
  "ASIL": "  QM",
  "Text": "Inputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn \n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn_sc \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Inputs",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356485.0",
  "Description": "Inputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn \n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn_sc \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Outputs

StAcv

CustFctOut_LgtLimA_StAcv

All other Outputs

CustFctOut_LgtLimA_ADmd

CustFctOut_LgtLimA_APredTar

CustFctOut_LgtLimA_AGrdMaxDec

CustFctOut_LgtLimA_AGrdMaxInc

CustFctOut_LgtLimA_ATlrHiTar

CustFctOut_LgtLimA_ATlrHiDyn

CustFctOut_LgtLimA_MdTarDyn

States

CustFctOut_LgtLimA_StDiagEve

Raw

{
  "ID": "16665434.0",
  "ASIL": "  QM",
  "Text": "Outputs\n\r \n\r \n\rStAcv\n\rCustFctOut_LgtLimA_StAcv\n\r \n\rAll other Outputs\n\rCustFctOut_LgtLimA_ADmd\n\rCustFctOut_LgtLimA_APredTar\n\rCustFctOut_LgtLimA_AGrdMaxDec\n\rCustFctOut_LgtLimA_AGrdMaxInc\n\rCustFctOut_LgtLimA_ATlrHiTar\n\rCustFctOut_LgtLimA_ATlrHiDyn\n\rCustFctOut_LgtLimA_MdTarDyn\n\r \n\r \n\rStates\n\rCustFctOut_LgtLimA_StDiagEve",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Outputs",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356490.0",
  "Description": "Outputs\n\r \n\r \n\rStAcv\n\rCustFctOut_LgtLimA_StAcv\n\r \n\rAll other Outputs\n\rCustFctOut_LgtLimA_ADmd\n\rCustFctOut_LgtLimA_APredTar\n\rCustFctOut_LgtLimA_AGrdMaxDec\n\rCustFctOut_LgtLimA_AGrdMaxInc\n\rCustFctOut_LgtLimA_ATlrHiTar\n\rCustFctOut_LgtLimA_ATlrHiDyn\n\rCustFctOut_LgtLimA_MdTarDyn\n\r \n\r \n\rStates\n\rCustFctOut_LgtLimA_StDiagEve",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Merged classifier of LgtLimA input signal classifiers

(Note: The classifier information of all LgtLimA input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_LgtLimA_StAcv_sc 

CustFctIn_LgtLimA_ADmd_sc 

CustFctIn_LgtLimA_APredTar_sc 

CustFctIn_LgtLimA_AGrdMaxDec_sc 

CustFctIn_LgtLimA_AGrdMaxInc_sc 

CustFctIn_LgtLimA_ATlrHiTar_sc 

CustFctIn_LgtLimA_ATlrHiDyn_sc 

CustFctIn_LgtLimA_MdTarDyn _sc

THEN:

the corresponding Bits of the merged classifier (internal) are true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) are false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

Raw

{
  "ID": "16665435.0",
  "ASIL": "  QM",
  "Text": "Merged classifier of LgtLimA input signal classifiers\n\r(Note: The classifier information of all LgtLimA input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n\r \n\rIF BitwiseOR: \n\rone or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn _sc\n\rTHEN:\n\rthe corresponding Bits of the merged classifier (internal) are true\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rELSE:\n\rthe corresponding Bits of the merged classifier (internal) are false\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Merged classifier of LgtLimA input signal classifiers",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356491.0",
  "Description": "Merged classifier of LgtLimA input signal classifiers\n\r(Note: The classifier information of all LgtLimA input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n\r \n\rIF BitwiseOR: \n\rone or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn _sc\n\rTHEN:\n\rthe corresponding Bits of the merged classifier (internal) are true\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rELSE:\n\rthe corresponding Bits of the merged classifier (internal) are false\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Detect neutral LgtLimA-Inputs

Note: Classifier Bit1 (FlgValCod - Neutral value) of all input signals, which have a neutral value, are considered in the neutral value check. "LgtLimA-Inputs are neutral" means, that at least one input signal has neutral values. "LgtLimA-Inputs are NOT neutral" means, that at no input signal has neutral values.

IF: 

Bit1 of BitwiseOR ( 

CustFctIn_LgtLimA_ADmd_sc 

CustFctIn_LgtLimA_APredTar_sc 

CustFctIn_LgtLimA_AGrdMaxDec_sc 

CustFctIn_LgtLimA_AGrdMaxInc_sc 

CustFctIn_LgtLimA_ATlrHiTar_sc 

CustFctIn_LgtLimA_ATlrHiDyn_sc ) 

is set 

THEN: 

LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) 

ELSE: 

LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral)

Raw

{
  "ID": "16665436.0",
  "ASIL": "  QM",
  "Text": "Detect neutral LgtLimA-Inputs\n\rNote: Classifier Bit1 (FlgValCod - Neutral value) of all input signals, which have a neutral value, are considered in the neutral value check. \"LgtLimA-Inputs are neutral\" means, that at least one input signal has neutral values. \"LgtLimA-Inputs are NOT neutral\" means, that at no input signal has neutral values.\n\r \n\rIF: \n\rBit1 of BitwiseOR ( \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc ) \n\ris set \n\rTHEN: \n\rLgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\rELSE: \n\rLgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Detect neutral LgtLimA-Inputs",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356488.0",
  "Description": "Detect neutral LgtLimA-Inputs\n\rNote: Classifier Bit1 (FlgValCod - Neutral value) of all input signals, which have a neutral value, are considered in the neutral value check. \"LgtLimA-Inputs are neutral\" means, that at least one input signal has neutral values. \"LgtLimA-Inputs are NOT neutral\" means, that at no input signal has neutral values.\n\r \n\rIF: \n\rBit1 of BitwiseOR ( \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc ) \n\ris set \n\rTHEN: \n\rLgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\rELSE: \n\rLgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv

IF [AND(1,2)]: 

1) CustFctIn_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

2) LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral) 

THEN: 

CustFctOut_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

ELSEIF [AND(1,2,3)]: 

1) CustFctIn_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcv 

2) LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) 

3) Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true 

THEN: 

CustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcvNeut 

ELSE: 

CustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctNoReq

Note: The expression "Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true" means that the Bit position, described by the mentioned constant, shall be evaluated in the input signal. If constant is equal to 1, Bit1 of the input signal shall be evaluated. If Bit position is true, the expression "Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true" shall be true.

Raw

{
  "ID": "16665437.0",
  "ASIL": "  QM",
  "Text": "Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv\n\r \n\rIF [AND(1,2)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r2) LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral) \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r \n\rELSEIF [AND(1,2,3)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcv \n\r2) LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\r3) Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcvNeut \n\r \n\rELSE: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctNoReq\n\r \n\rNote: The expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" means that the Bit position, described by the mentioned constant, shall be evaluated in the input signal. If constant is equal to 1, Bit1 of the input signal shall be evaluated. If Bit position is true, the expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" shall be true.",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356489.0",
  "Description": "Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv\n\r \n\rIF [AND(1,2)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r2) LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral) \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r \n\rELSEIF [AND(1,2,3)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcv \n\r2) LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\r3) Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcvNeut \n\r \n\rELSE: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctNoReq\n\r \n\rNote: The expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" means that the Bit position, described by the mentioned constant, shall be evaluated in the input signal. If constant is equal to 1, Bit1 of the input signal shall be evaluated. If Bit position is true, the expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" shall be true.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:

Input:

*TurnOff equal to CustFctIn_LgtLimA_TurnOff

*FlgIniExcDet equal to CustFctIn_LgtLimA_FlgIniExcDet

*FlgErrQlfAcv equal to CustFctIn_LgtLimA_FlgErrQlfAcv

merged classifier

RangeCheck

Output:

CustFctOut_LgtLimA_StDiagEve equal to *StDiagEve

Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).

Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:

specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information

(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)

Raw

{
  "ID": "16665438.0",
  "ASIL": "  QM",
  "Text": "LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:\n\r \n\rInput:\n\r*TurnOff equal to CustFctIn_LgtLimA_TurnOff\n\r*FlgIniExcDet equal to CustFctIn_LgtLimA_FlgIniExcDet\n\r*FlgErrQlfAcv equal to CustFctIn_LgtLimA_FlgErrQlfAcv\n\rmerged classifier\n\rRangeCheck\n\r \n\rOutput:\n\rCustFctOut_LgtLimA_StDiagEve equal to *StDiagEve\n\r \n\r \n\rNote: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).\n\rSummary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n\rspecific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n\r \n\r(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356495.0",
  "Description": "LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:\n\r \n\rInput:\n\r*TurnOff equal to CustFctIn_LgtLimA_TurnOff\n\r*FlgIniExcDet equal to CustFctIn_LgtLimA_FlgIniExcDet\n\r*FlgErrQlfAcv equal to CustFctIn_LgtLimA_FlgErrQlfAcv\n\rmerged classifier\n\rRangeCheck\n\r \n\rOutput:\n\rCustFctOut_LgtLimA_StDiagEve equal to *StDiagEve\n\r \n\r \n\rNote: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).\n\rSummary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n\rspecific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n\r \n\r(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

The following functional requirement describes the valid case of the LgtLimA Service Bridge.

Note:

The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "*_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.

* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

* Disable Case:

* NotVld Case:

* Fail Case:

* Init Case:

* Susp Case:

For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.

Raw

{
  "ID": "16665439.0",
  "ASIL": "  ",
  "Text": "The following functional requirement describes the valid case of the LgtLimA Service Bridge.\n\r \n\rNote:\n\rThe following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"*_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n\r* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r* Disable Case:\n\r* NotVld Case:\n\r* Fail Case:\n\r* Init Case:\n\r* Susp Case:\n\rFor example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.",
  "Type": "Information",
  "Status": "",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356487.0",
  "Description": "The following functional requirement describes the valid case of the LgtLimA Service Bridge.\n\r \n\rNote:\n\rThe following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"*_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n\r* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r* Disable Case:\n\r* NotVld Case:\n\r* Fail Case:\n\r* Init Case:\n\r* Susp Case:\n\rFor example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNone

THEN: 

CustFctOut_LgtLimA_StAcv = CustFctIn_LgtLimA_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv)

CustFctOut_LgtLimA_ADmd = CustFctIn_LgtLimA_ADmd 

CustFctOut_LgtLimA_APredTar = CustFctIn_LgtLimA_APredTar 

CustFctOut_LgtLimA_AGrdMaxDec = CustFctIn_LgtLimA_AGrdMaxDec 

CustFctOut_LgtLimA_AGrdMaxInc = CustFctIn_LgtLimA_AGrdMaxInc 

CustFctOut_LgtLimA_ATlrHiTar = CustFctIn_LgtLimA_ATlrHiTar 

CustFctOut_LgtLimA_ATlrHiDyn = CustFctIn_LgtLimA_ATlrHiDyn 

CustFctOut_LgtLimA_MdTarDyn = CustFctIn_LgtLimA_MdTarDyn

Raw

{
  "ID": "16665440.0",
  "ASIL": "  QM",
  "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r \n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNone\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = CustFctIn_LgtLimA_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv)\n\rCustFctOut_LgtLimA_ADmd = CustFctIn_LgtLimA_ADmd \n\rCustFctOut_LgtLimA_APredTar = CustFctIn_LgtLimA_APredTar \n\rCustFctOut_LgtLimA_AGrdMaxDec = CustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctOut_LgtLimA_AGrdMaxInc = CustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctOut_LgtLimA_ATlrHiTar = CustFctIn_LgtLimA_ATlrHiTar \n\rCustFctOut_LgtLimA_ATlrHiDyn = CustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctOut_LgtLimA_MdTarDyn = CustFctIn_LgtLimA_MdTarDyn",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356494.0",
  "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r \n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNone\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = CustFctIn_LgtLimA_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv)\n\rCustFctOut_LgtLimA_ADmd = CustFctIn_LgtLimA_ADmd \n\rCustFctOut_LgtLimA_APredTar = CustFctIn_LgtLimA_APredTar \n\rCustFctOut_LgtLimA_AGrdMaxDec = CustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctOut_LgtLimA_AGrdMaxInc = CustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctOut_LgtLimA_ATlrHiTar = CustFctIn_LgtLimA_ATlrHiTar \n\rCustFctOut_LgtLimA_ATlrHiDyn = CustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctOut_LgtLimA_MdTarDyn = CustFctIn_LgtLimA_MdTarDyn",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_LgtLimA_StAcv is set to a defined value or frozen to the last valid value.

* All other Outputs will be frozen to the last valid value.

Raw

{
  "ID": "16665441.0",
  "ASIL": "  ",
  "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.\n\r* CustFctOut_LgtLimA_StAcv is set to a defined value or frozen to the last valid value.\n\r* All other Outputs will be frozen to the last valid value.",
  "Type": "Information",
  "Status": "",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1356492.0",
  "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.\n\r* CustFctOut_LgtLimA_StAcv is set to a defined value or frozen to the last valid value.\n\r* All other Outputs will be frozen to the last valid value.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Disable Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "16665442.0",
  "ASIL": "  QM",
  "Text": "Disable Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigDi\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Disable Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356483.0",
  "Description": "Disable Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigDi\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

NotVld Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "16665443.0",
  "ASIL": "  QM",
  "Text": "NotVld Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNotVld\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "NotVld Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356482.0",
  "Description": "NotVld Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNotVld\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Fail Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigFail

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "16665444.0",
  "ASIL": "  QM",
  "Text": "Fail Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigFail\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Fail Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356481.0",
  "Description": "Fail Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigFail\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Init

 Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "16665445.0",
  "ASIL": "  QM",
  "Text": "Init\n\r Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigIni\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Init Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356486.0",
  "Description": "Init\n\r Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigIni\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Susp Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_LgtLimA_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "16665446.0",
  "ASIL": "  QM",
  "Text": "Susp Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigSusp\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Susp Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1356493.0",
  "Description": "Susp Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigSusp\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

LgtLimA Service Bridge (LIM specific)

Raw

{
  "ID": "37334915.0",
  "ASIL": "  ",
  "Text": "LgtLimA Service Bridge (LIM specific)",
  "Type": "Folder",
  "Status": "",
  "Summary": "LgtLimA Service Bridge (LIM specific)",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "",
  "Vehicle Launch": "",
  "Vehicle Platform": ""
}

Inputs

Signal-Values:

CustFctIn_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar 

CustFctIn_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA_ATlrHiTar 

CustFctIn_LgtLimA_ATlrHiDyn 

CustFctIn_LgtLimA_MdTarDyn 

CustFctIn_PEA_SystemStateLimiter 

CustFctIn_PEA_SetSpeed 

Signal-Classifier:

CustFctIn_LgtLimA_StAcv_sc 

CustFctIn_LgtLimA_ADmd_sc 

CustFctIn_LgtLimA_APredTar_sc 

CustFctIn_LgtLimA_AGrdMaxDec_sc 

CustFctIn_LgtLimA_AGrdMaxInc_sc 

CustFctIn_LgtLimA_ATlrHiTar_sc 

CustFctIn_LgtLimA_ATlrHiDyn_sc 

CustFctIn_LgtLimA_MdTarDyn_sc 

CustFctIn_PEA_SystemStateLimiter_sc 

CustFctIn_PEA_SetSpeed_sc 

Parameters 

CustFctIn_LgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff

Raw

{
  "ID": "37334916.0",
  "ASIL": "  QM",
  "Text": "Inputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn \n\rCustFctIn_PEA_SystemStateLimiter \n\rCustFctIn_PEA_SetSpeed \n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn_sc \n\rCustFctIn_PEA_SystemStateLimiter_sc \n\rCustFctIn_PEA_SetSpeed_sc \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Inputs",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Inputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn \n\rCustFctIn_PEA_SystemStateLimiter \n\rCustFctIn_PEA_SetSpeed \n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn_sc \n\rCustFctIn_PEA_SystemStateLimiter_sc \n\rCustFctIn_PEA_SetSpeed_sc \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Outputs

StAcv

CustFctOut_LgtLimA_StAcv

All other Outputs

CustFctOut_LgtLimA_ADmd

CustFctOut_LgtLimA_APredTar

CustFctOut_LgtLimA_AGrdMaxDec

CustFctOut_LgtLimA_AGrdMaxInc

CustFctOut_LgtLimA_ATlrHiTar

CustFctOut_LgtLimA_ATlrHiDyn

CustFctOut_LgtLimA_MdTarDyn

LIM PEA

CustFctOut_LIM_SysStLim

CustFctOut_LIM_VSet

States

CustFctOut_LgtLimA_StDiagEve

Raw

{
  "ID": "37334917.0",
  "ASIL": "  QM",
  "Text": "Outputs\n\r \n\r \n\rStAcv\n\rCustFctOut_LgtLimA_StAcv\n\r \n\rAll other Outputs\n\rCustFctOut_LgtLimA_ADmd\n\rCustFctOut_LgtLimA_APredTar\n\rCustFctOut_LgtLimA_AGrdMaxDec\n\rCustFctOut_LgtLimA_AGrdMaxInc\n\rCustFctOut_LgtLimA_ATlrHiTar\n\rCustFctOut_LgtLimA_ATlrHiDyn\n\rCustFctOut_LgtLimA_MdTarDyn\n\r \n\rLIM PEA\n\rCustFctOut_LIM_SysStLim\n\rCustFctOut_LIM_VSet\n\r \n\rStates\n\rCustFctOut_LgtLimA_StDiagEve",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Outputs",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Outputs\n\r \n\r \n\rStAcv\n\rCustFctOut_LgtLimA_StAcv\n\r \n\rAll other Outputs\n\rCustFctOut_LgtLimA_ADmd\n\rCustFctOut_LgtLimA_APredTar\n\rCustFctOut_LgtLimA_AGrdMaxDec\n\rCustFctOut_LgtLimA_AGrdMaxInc\n\rCustFctOut_LgtLimA_ATlrHiTar\n\rCustFctOut_LgtLimA_ATlrHiDyn\n\rCustFctOut_LgtLimA_MdTarDyn\n\r \n\rLIM PEA\n\rCustFctOut_LIM_SysStLim\n\rCustFctOut_LIM_VSet\n\r \n\rStates\n\rCustFctOut_LgtLimA_StDiagEve",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Merged classifier of LgtLimA input signal classifiers

(Note: The classifier information of all LgtLimA input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)

IF BitwiseOR: 

one or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

CustFctIn_LgtLimA_StAcv_sc 

CustFctIn_LgtLimA_ADmd_sc 

CustFctIn_LgtLimA_APredTar_sc 

CustFctIn_LgtLimA_AGrdMaxDec_sc 

CustFctIn_LgtLimA_AGrdMaxInc_sc 

CustFctIn_LgtLimA_ATlrHiTar_sc 

CustFctIn_LgtLimA_ATlrHiDyn_sc 

CustFctIn_LgtLimA_MdTarDyn _sc 

CustFctIn_PEA_SystemStateLimiter_sc 

CustFctIn_PEA_SetSpeed_sc

THEN:

the corresponding Bits of the merged classifier (internal) are true

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

ELSE:

the corresponding Bits of the merged classifier (internal) are false

(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)

Raw

{
  "ID": "37334918.0",
  "ASIL": "  QM",
  "Text": "Merged classifier of LgtLimA input signal classifiers\n\r(Note: The classifier information of all LgtLimA input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n\r \n\rIF BitwiseOR: \n\rone or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn _sc \n\rCustFctIn_PEA_SystemStateLimiter_sc \n\rCustFctIn_PEA_SetSpeed_sc\n\rTHEN:\n\rthe corresponding Bits of the merged classifier (internal) are true\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rELSE:\n\rthe corresponding Bits of the merged classifier (internal) are false\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Merged classifier of LgtLimA input signal classifiers",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Merged classifier of LgtLimA input signal classifiers\n\r(Note: The classifier information of all LgtLimA input signals are merged to one single internal classifier (merged classifier) by a bitwise OR operation)\n\r \n\rIF BitwiseOR: \n\rone or more of the following classifier Bits are true (Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rCustFctIn_LgtLimA_StAcv_sc \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc \n\rCustFctIn_LgtLimA_MdTarDyn _sc \n\rCustFctIn_PEA_SystemStateLimiter_sc \n\rCustFctIn_PEA_SetSpeed_sc\n\rTHEN:\n\rthe corresponding Bits of the merged classifier (internal) are true\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)\n\rELSE:\n\rthe corresponding Bits of the merged classifier (internal) are false\n\r(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Detect neutral LgtLimA-Inputs

Note: Classifier Bit1 (FlgValCod - Neutral value) of all input signals, which have a neutral value, are considered in the neutral value check. "LgtLimA-Inputs are neutral" means, that at least one input signal has neutral values. "LgtLimA-Inputs are NOT neutral" means, that at no input signal has neutral values.

IF: 

Bit1 of BitwiseOR ( 

CustFctIn_LgtLimA_ADmd_sc 

CustFctIn_LgtLimA_APredTar_sc 

CustFctIn_LgtLimA_AGrdMaxDec_sc 

CustFctIn_LgtLimA_AGrdMaxInc_sc 

CustFctIn_LgtLimA_ATlrHiTar_sc 

CustFctIn_LgtLimA_ATlrHiDyn_sc ) 

is set 

THEN: 

LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) 

ELSE: 

LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral)

Raw

{
  "ID": "37334919.0",
  "ASIL": "  QM",
  "Text": "Detect neutral LgtLimA-Inputs\n\rNote: Classifier Bit1 (FlgValCod - Neutral value) of all input signals, which have a neutral value, are considered in the neutral value check. \"LgtLimA-Inputs are neutral\" means, that at least one input signal has neutral values. \"LgtLimA-Inputs are NOT neutral\" means, that at no input signal has neutral values.\n\r \n\rIF: \n\rBit1 of BitwiseOR ( \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc ) \n\ris set \n\rTHEN: \n\rLgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\rELSE: \n\rLgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Detect neutral LgtLimA-Inputs",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Detect neutral LgtLimA-Inputs\n\rNote: Classifier Bit1 (FlgValCod - Neutral value) of all input signals, which have a neutral value, are considered in the neutral value check. \"LgtLimA-Inputs are neutral\" means, that at least one input signal has neutral values. \"LgtLimA-Inputs are NOT neutral\" means, that at no input signal has neutral values.\n\r \n\rIF: \n\rBit1 of BitwiseOR ( \n\rCustFctIn_LgtLimA_ADmd_sc \n\rCustFctIn_LgtLimA_APredTar_sc \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc ) \n\ris set \n\rTHEN: \n\rLgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\rELSE: \n\rLgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv

IF [AND(1,2)]: 

1) CustFctIn_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

2) LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral) 

THEN: 

CustFctOut_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv

ELSEIF [AND(1,2,3)]: 

1) CustFctIn_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcv 

2) LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) 

3) Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true 

THEN: 

CustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcvNeut 

ELSE: 

CustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctNoReq

Note: The expression "Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true" means that the Bit position, described by the mentioned constant, shall be evaluated in the input signal. If constant is equal to 1, Bit1 of the input signal shall be evaluated. If Bit position is true, the expression "Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true" shall be true.

Raw

{
  "ID": "37334920.0",
  "ASIL": "  QM",
  "Text": "Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv\n\r \n\rIF [AND(1,2)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r2) LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral) \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r \n\rELSEIF [AND(1,2,3)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcv \n\r2) LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\r3) Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcvNeut \n\r \n\rELSE: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctNoReq\n\r \n\rNote: The expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" means that the Bit position, described by the mentioned constant, shall be evaluated in the input signal. If constant is equal to 1, Bit1 of the input signal shall be evaluated. If Bit position is true, the expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" shall be true.",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv\n\r \n\rIF [AND(1,2)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r2) LgtLimA-Inputs are NOT neutral (LgtLimA-Inputs not neutral) \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_SINFCT_c_CusFctIn_StReqAcv\n\r \n\rELSEIF [AND(1,2,3)]: \n\r1) CustFctIn_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcv \n\r2) LgtLimA-Inputs are neutral (LgtLimA-Inputs neutral) \n\r3) Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true \n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctAcvNeut \n\r \n\rELSE: \n\rCustFctOut_LgtLimA_StAcv is equal to VMMP_c_StReqCusFctNoReq\n\r \n\rNote: The expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" means that the Bit position, described by the mentioned constant, shall be evaluated in the input signal. If constant is equal to 1, Bit1 of the input signal shall be evaluated. If Bit position is true, the expression \"Bit position VMMP_SINFCT_c_LgtLimA_IdxBitFldConfMdNeutArbAcv of the input CustFctIn_LgtLimA_BitFldConf is true\" shall be true.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:

Input:

*TurnOff equal to CustFctIn_LgtLimA_TurnOff

*FlgIniExcDet equal to CustFctIn_LgtLimA_FlgIniExcDet

*FlgErrQlfAcv equal to CustFctIn_LgtLimA_FlgErrQlfAcv

merged classifier

RangeCheck

Output:

CustFctOut_LgtLimA_StDiagEve equal to *StDiagEve

Note: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).

Summary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:

specific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information

(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)

Raw

{
  "ID": "37334921.0",
  "ASIL": "  QM",
  "Text": "LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:\n\r \n\rInput:\n\r*TurnOff equal to CustFctIn_LgtLimA_TurnOff\n\r*FlgIniExcDet equal to CustFctIn_LgtLimA_FlgIniExcDet\n\r*FlgErrQlfAcv equal to CustFctIn_LgtLimA_FlgErrQlfAcv\n\rmerged classifier\n\rRangeCheck\n\r \n\rOutput:\n\rCustFctOut_LgtLimA_StDiagEve equal to *StDiagEve\n\r \n\r \n\rNote: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).\n\rSummary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n\rspecific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n\r \n\r(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "LgtLimA Service Bridge shall use Signalmonitoring with following signal assignment:\n\r \n\rInput:\n\r*TurnOff equal to CustFctIn_LgtLimA_TurnOff\n\r*FlgIniExcDet equal to CustFctIn_LgtLimA_FlgIniExcDet\n\r*FlgErrQlfAcv equal to CustFctIn_LgtLimA_FlgErrQlfAcv\n\rmerged classifier\n\rRangeCheck\n\r \n\rOutput:\n\rCustFctOut_LgtLimA_StDiagEve equal to *StDiagEve\n\r \n\r \n\rNote: This PreCondition and the Service Bridge connect the service specific customer function input information (Input: CustFctIn_*, merged classifier, RangeCheck) to the the generic Signalmonitoring (input of Signalmonitoring). Moreover this PreCondition connects also the generic *StDiagEve information (output of Signalmonitoring) to the service specific customer function output information (Output: CustFctOut_*).\n\rSummary: This PreConditions defines the connection between customer function, Service Bridge and Signalmonitoring in the following way:\n\rspecific customer function input information --> Service Bridge input --> Signalmonitoring input --> Signalmonitoring output --> Service Bridge output --> specific customer function output information\n\r \n\r(This concept is used to allow the generic description of Signalmonitoring and Service Bridge once for all customer functions)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

The following functional requirement describes the valid case of the LgtLimA Service Bridge.

Note:

The following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal "*_StDiagEve" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.

* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

* Disable Case:

* NotVld Case:

* Fail Case:

* Init Case:

* Susp Case:

For example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.

Raw

{
  "ID": "37334922.0",
  "ASIL": "  ",
  "Text": "The following functional requirement describes the valid case of the LgtLimA Service Bridge.\n\r \n\rNote:\n\rThe following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"*_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n\r* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r* Disable Case:\n\r* NotVld Case:\n\r* Fail Case:\n\r* Init Case:\n\r* Susp Case:\n\rFor example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.",
  "Type": "Information",
  "Status": "",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "The following functional requirement describes the valid case of the LgtLimA Service Bridge.\n\r \n\rNote:\n\rThe following functional requirements for case description do not need an Else-Path because only one case will be set at the same time (all cases refer to the signal \"*_StDiagEve\" and check one specific value). If one case is not set, an other case will be set. It is not possible that no case is set. It is also not possible that two or more cases are set at the same time.\n\r* Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r* Disable Case:\n\r* NotVld Case:\n\r* Fail Case:\n\r* Init Case:\n\r* Susp Case:\n\rFor example: It can't be defined which case is set, if Valid Case is not set. Therefore a general Else-Path is not useful.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNone

THEN: 

CustFctOut_LgtLimA_StAcv = CustFctIn_LgtLimA_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv)

CustFctOut_LgtLimA_ADmd = CustFctIn_LgtLimA_ADmd 

CustFctOut_LgtLimA_APredTar = CustFctIn_LgtLimA_APredTar 

CustFctOut_LgtLimA_AGrdMaxDec = CustFctIn_LgtLimA_AGrdMaxDec 

CustFctOut_LgtLimA_AGrdMaxInc = CustFctIn_LgtLimA_AGrdMaxInc 

CustFctOut_LgtLimA_ATlrHiTar = CustFctIn_LgtLimA_ATlrHiTar 

CustFctOut_LgtLimA_ATlrHiDyn = CustFctIn_LgtLimA_ATlrHiDyn 

CustFctOut_LgtLimA_MdTarDyn = CustFctIn_LgtLimA_MdTarDyn 

CustFctOut_LIM_SysStLim = CustFctIn_PEA_SystemStateLimiter 

CustFctOut_LIM_VSet = CustFctIn_PEA_SetSpeed

Raw

{
  "ID": "37334923.0",
  "ASIL": "  QM",
  "Text": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r \n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNone\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = CustFctIn_LgtLimA_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv)\n\rCustFctOut_LgtLimA_ADmd = CustFctIn_LgtLimA_ADmd \n\rCustFctOut_LgtLimA_APredTar = CustFctIn_LgtLimA_APredTar \n\rCustFctOut_LgtLimA_AGrdMaxDec = CustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctOut_LgtLimA_AGrdMaxInc = CustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctOut_LgtLimA_ATlrHiTar = CustFctIn_LgtLimA_ATlrHiTar \n\rCustFctOut_LgtLimA_ATlrHiDyn = CustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctOut_LgtLimA_MdTarDyn = CustFctIn_LgtLimA_MdTarDyn \n\rCustFctOut_LIM_SysStLim = CustFctIn_PEA_SystemStateLimiter \n\rCustFctOut_LIM_VSet = CustFctIn_PEA_SetSpeed",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Valid Case: No errors. Input signals are routed to the output signals (considering pre-conditions)\n\r \n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNone\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = CustFctIn_LgtLimA_StAcv (considering Mapping and Neutral-Value-Handling of CustFctIn_LgtLimA_StAcv)\n\rCustFctOut_LgtLimA_ADmd = CustFctIn_LgtLimA_ADmd \n\rCustFctOut_LgtLimA_APredTar = CustFctIn_LgtLimA_APredTar \n\rCustFctOut_LgtLimA_AGrdMaxDec = CustFctIn_LgtLimA_AGrdMaxDec \n\rCustFctOut_LgtLimA_AGrdMaxInc = CustFctIn_LgtLimA_AGrdMaxInc \n\rCustFctOut_LgtLimA_ATlrHiTar = CustFctIn_LgtLimA_ATlrHiTar \n\rCustFctOut_LgtLimA_ATlrHiDyn = CustFctIn_LgtLimA_ATlrHiDyn \n\rCustFctOut_LgtLimA_MdTarDyn = CustFctIn_LgtLimA_MdTarDyn \n\rCustFctOut_LIM_SysStLim = CustFctIn_PEA_SystemStateLimiter \n\rCustFctOut_LIM_VSet = CustFctIn_PEA_SetSpeed",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.

* CustFctOut_LgtLimA_StAcv is set to a defined value or frozen to the last valid value.

* CustFctOut_LIM_SysStLim is set to a defined value or frozen to the last valid value.

* CustFctOut_LIM_VSet is set to a defined value or frozen to the last valid value.

* All other Outputs will be frozen to the last valid value.

Raw

{
  "ID": "37334924.0",
  "ASIL": "  ",
  "Text": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.\n\r* CustFctOut_LgtLimA_StAcv is set to a defined value or frozen to the last valid value.\n\r* CustFctOut_LIM_SysStLim is set to a defined value or frozen to the last valid value.\n\r* CustFctOut_LIM_VSet is set to a defined value or frozen to the last valid value.\n\r* All other Outputs will be frozen to the last valid value.",
  "Type": "Information",
  "Status": "",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "The following functional requirements describe different cases of errors. In cases of errors, the result of input signal monitoring (*StDiagEve) determines the output signal behaviour.\n\r* CustFctOut_LgtLimA_StAcv is set to a defined value or frozen to the last valid value.\n\r* CustFctOut_LIM_SysStLim is set to a defined value or frozen to the last valid value.\n\r* CustFctOut_LIM_VSet is set to a defined value or frozen to the last valid value.\n\r* All other Outputs will be frozen to the last valid value.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Disable Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigDi

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff

CustFctOut_LIM_VSet = 127.7835

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "37334925.0",
  "ASIL": "  QM",
  "Text": "Disable Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigDi\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Disable Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Disable Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigDi\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

NotVld Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNotVld

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff

CustFctOut_LIM_VSet = 127.7835

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "37334926.0",
  "ASIL": "  QM",
  "Text": "NotVld Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNotVld\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "NotVld Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "NotVld Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigNotVld\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Fail Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigFail

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff

CustFctOut_LIM_VSet = 127.7835

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "37334927.0",
  "ASIL": "  QM",
  "Text": "Fail Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigFail\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Fail Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Fail Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigFail\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Init

 Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigIni

THEN: 

CustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq

CustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff

CustFctOut_LIM_VSet = 127.7835

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "37334928.0",
  "ASIL": "  QM",
  "Text": "Init\n\r Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigIni\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Init Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Init\n\r Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigIni\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv = VMMP_c_StReqCusFctNoReq\n\rCustFctOut_LIM_SysStLim = VMMP_c_LIMSysStLimOff\n\rCustFctOut_LIM_VSet = 127.7835\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Susp Case:

IF: 

CustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigSusp

THEN: 

CustFctOut_LgtLimA_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_LIM_SysStLim shall be equal to the value of previous computation cycle (Hold Last Value)

CustFctOut_LIM_VSet shall be equal to the value of previous computation cycle (Hold Last Value)

All other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)

Raw

{
  "ID": "37334929.0",
  "ASIL": "  QM",
  "Text": "Susp Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigSusp\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n\rCustFctOut_LIM_SysStLim shall be equal to the value of previous computation cycle (Hold Last Value)\n\rCustFctOut_LIM_VSet shall be equal to the value of previous computation cycle (Hold Last Value)\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Susp Case:",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Susp Case:\n\r \n\rIF: \n\rCustFctOut_LgtLimA_StDiagEve = VMMP_c_DiagEveSigSusp\n\rTHEN: \n\rCustFctOut_LgtLimA_StAcv shall be equal to the value of previous computation cycle (Hold Last Value)\n\rCustFctOut_LIM_SysStLim shall be equal to the value of previous computation cycle (Hold Last Value)\n\rCustFctOut_LIM_VSet shall be equal to the value of previous computation cycle (Hold Last Value)\n\rAll other Outputs shall be equal to the value of previous computation cycle (Hold Last Value)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Specific Conditions and Requirements

Raw

{
  "ID": "16665447.0",
  "ASIL": "  ",
  "Text": "Specific Conditions and Requirements",
  "Type": "Folder",
  "Status": "",
  "Summary": "Specific Conditions and Requirements",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1336858.0",
  "Description": "",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

LIM LgtLimA Service

Raw

{
  "ID": "16665448.0",
  "ASIL": "  ",
  "Text": "LIM LgtLimA Service",
  "Type": "Folder",
  "Status": "",
  "Summary": "LIM LgtLimA Service",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1336866.0",
  "Description": "",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Replace generic input signals by specific input signals

Inputs

Signal-Values:

CustFctIn_LgtLimA_StAcv = LIM_s_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd = LIM_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar = LIM_s_LgtLimA_APredTar 

CustFctIn_LgtLimA_AGrdMaxDec = LIM_s_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA_AGrdMaxInc = LIM_s_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA_ATlrHiTar = LIM_s_LgtLimA_ATlrHiTar 

CustFctIn_LgtLimA_ATlrHiDyn = LIM_s_LgtLimA_ATlrHiDyn 

CustFctIn_LgtLimA_MdTarDyn = LIM_s_LgtLimA_MdTarDyn

Signal-Classifier:

CustFctIn_LgtLimA_StAcv_sc = LIM_sc_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd_sc = LIM_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar_sc = LIM_sc_LgtLimA_APredTar 

CustFctIn_LgtLimA_AGrdMaxDec_sc = LIM_sc_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA_AGrdMaxInc_sc = LIM_sc_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA_ATlrHiTar_sc = LIM_sc_LgtLimA_ATlrHiTar 

CustFctIn_LgtLimA_ATlrHiDyn_sc = LIM_sc_LgtLimA_ATlrHiDyn 

CustFctIn_LgtLimA_MdTarDyn_sc = LIM_sc_LgtLimA_MdTarDyn 

Parameters 

CustFctIn_LgtLimA_BitFldConf = VMMP_CFBLIM_p_LIMLgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBLIM_c_LIMLgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBLIM_c_LIMLgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff = VMMP_CFBLIM_p_LIMLgtLimA_TurnOff

Raw

{
  "ID": "16665449.0",
  "ASIL": "  QM",
  "Text": "Replace generic input signals by specific input signals\n\r \n\r\n\rInputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv = LIM_s_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd = LIM_s_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar = LIM_s_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec = LIM_s_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc = LIM_s_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar = LIM_s_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn = LIM_s_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn = LIM_s_LgtLimA_MdTarDyn\n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc = LIM_sc_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd_sc = LIM_sc_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar_sc = LIM_sc_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc = LIM_sc_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc = LIM_sc_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc = LIM_sc_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc = LIM_sc_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn_sc = LIM_sc_LgtLimA_MdTarDyn \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf = VMMP_CFBLIM_p_LIMLgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBLIM_c_LIMLgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBLIM_c_LIMLgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff = VMMP_CFBLIM_p_LIMLgtLimA_TurnOff",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Replace generic input signals by specific input signals",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1339837.0",
  "Description": "Replace generic input signals by specific input signals\n\r \n\r\n\rInputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv = LIM_s_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd = LIM_s_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar = LIM_s_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec = LIM_s_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc = LIM_s_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar = LIM_s_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn = LIM_s_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn = LIM_s_LgtLimA_MdTarDyn\n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc = LIM_sc_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd_sc = LIM_sc_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar_sc = LIM_sc_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc = LIM_sc_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc = LIM_sc_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc = LIM_sc_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc = LIM_sc_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn_sc = LIM_sc_LgtLimA_MdTarDyn \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf = VMMP_CFBLIM_p_LIMLgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBLIM_c_LIMLgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBLIM_c_LIMLgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff = VMMP_CFBLIM_p_LIMLgtLimA_TurnOff",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Replace generic input signals by specific input signals 

Inputs

Signal-Values:

CustFctIn_LgtLimA_StAcv = LIM_s_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd = LIM_s_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar = LIM_s_LgtLimA_APredTar 

CustFctIn_LgtLimA_AGrdMaxDec = LIM_s_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA_AGrdMaxInc = LIM_s_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA_ATlrHiTar = LIM_s_LgtLimA_ATlrHiTar 

CustFctIn_LgtLimA_ATlrHiDyn = LIM_s_LgtLimA_ATlrHiDyn 

CustFctIn_LgtLimA_MdTarDyn = LIM_s_LgtLimA_MdTarDyn 

CustFctIn_PEA_SystemStateLimiter = LIM_s_PEA_SystemStateLimiter 

CustFctIn_PEA_SetSpeed = LIM_s_PEA_SetSpeed

Signal-Classifier:

CustFctIn_LgtLimA_StAcv_sc = LIM_sc_LgtLimA_StAcv 

CustFctIn_LgtLimA_ADmd_sc = LIM_sc_LgtLimA_ADmd 

CustFctIn_LgtLimA_APredTar_sc = LIM_sc_LgtLimA_APredTar 

CustFctIn_LgtLimA_AGrdMaxDec_sc = LIM_sc_LgtLimA_AGrdMaxDec 

CustFctIn_LgtLimA_AGrdMaxInc_sc = LIM_sc_LgtLimA_AGrdMaxInc 

CustFctIn_LgtLimA_ATlrHiTar_sc = LIM_sc_LgtLimA_ATlrHiTar 

CustFctIn_LgtLimA_ATlrHiDyn_sc = LIM_sc_LgtLimA_ATlrHiDyn 

CustFctIn_LgtLimA_MdTarDyn_sc = LIM_sc_LgtLimA_MdTarDyn 

CustFctIn_PEA_SystemStateLimiter_sc = LIM_sc_PEA_SystemStateLimiter 

CustFctIn_PEA_SetSpeed_sc = LIM_sc_PEA_SetSpeed 

Parameters 

CustFctIn_LgtLimA_BitFldConf = VMMP_CFBLIM_p_LIMLgtLimA_BitFldConf

CustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBLIM_c_LIMLgtLimA_FlgIniExcDet

CustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBLIM_c_LIMLgtLimA_FlgErrQlfAcv

CustFctIn_LgtLimA_TurnOff = VMMP_CFBLIM_p_LIMLgtLimA_TurnOff

Raw

{
  "ID": "37334599.0",
  "ASIL": "  QM",
  "Text": "Replace generic input signals by specific input signals \n\r\n\rInputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv = LIM_s_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd = LIM_s_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar = LIM_s_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec = LIM_s_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc = LIM_s_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar = LIM_s_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn = LIM_s_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn = LIM_s_LgtLimA_MdTarDyn \n\rCustFctIn_PEA_SystemStateLimiter = LIM_s_PEA_SystemStateLimiter \n\rCustFctIn_PEA_SetSpeed = LIM_s_PEA_SetSpeed\n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc = LIM_sc_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd_sc = LIM_sc_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar_sc = LIM_sc_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc = LIM_sc_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc = LIM_sc_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc = LIM_sc_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc = LIM_sc_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn_sc = LIM_sc_LgtLimA_MdTarDyn \n\rCustFctIn_PEA_SystemStateLimiter_sc = LIM_sc_PEA_SystemStateLimiter \n\rCustFctIn_PEA_SetSpeed_sc = LIM_sc_PEA_SetSpeed \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf = VMMP_CFBLIM_p_LIMLgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBLIM_c_LIMLgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBLIM_c_LIMLgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff = VMMP_CFBLIM_p_LIMLgtLimA_TurnOff",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "Replace generic input signals by specific input signals",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Replace generic input signals by specific input signals \n\r\n\rInputs\n\rSignal-Values:\n\rCustFctIn_LgtLimA_StAcv = LIM_s_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd = LIM_s_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar = LIM_s_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec = LIM_s_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc = LIM_s_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar = LIM_s_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn = LIM_s_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn = LIM_s_LgtLimA_MdTarDyn \n\rCustFctIn_PEA_SystemStateLimiter = LIM_s_PEA_SystemStateLimiter \n\rCustFctIn_PEA_SetSpeed = LIM_s_PEA_SetSpeed\n\r \n\rSignal-Classifier:\n\rCustFctIn_LgtLimA_StAcv_sc = LIM_sc_LgtLimA_StAcv \n\rCustFctIn_LgtLimA_ADmd_sc = LIM_sc_LgtLimA_ADmd \n\rCustFctIn_LgtLimA_APredTar_sc = LIM_sc_LgtLimA_APredTar \n\rCustFctIn_LgtLimA_AGrdMaxDec_sc = LIM_sc_LgtLimA_AGrdMaxDec \n\rCustFctIn_LgtLimA_AGrdMaxInc_sc = LIM_sc_LgtLimA_AGrdMaxInc \n\rCustFctIn_LgtLimA_ATlrHiTar_sc = LIM_sc_LgtLimA_ATlrHiTar \n\rCustFctIn_LgtLimA_ATlrHiDyn_sc = LIM_sc_LgtLimA_ATlrHiDyn \n\rCustFctIn_LgtLimA_MdTarDyn_sc = LIM_sc_LgtLimA_MdTarDyn \n\rCustFctIn_PEA_SystemStateLimiter_sc = LIM_sc_PEA_SystemStateLimiter \n\rCustFctIn_PEA_SetSpeed_sc = LIM_sc_PEA_SetSpeed \n\r \n\rParameters \n\rCustFctIn_LgtLimA_BitFldConf = VMMP_CFBLIM_p_LIMLgtLimA_BitFldConf\n\rCustFctIn_LgtLimA_FlgIniExcDet = VMMP_CFBLIM_c_LIMLgtLimA_FlgIniExcDet\n\rCustFctIn_LgtLimA_FlgErrQlfAcv = VMMP_CFBLIM_c_LIMLgtLimA_FlgErrQlfAcv\n\rCustFctIn_LgtLimA_TurnOff = VMMP_CFBLIM_p_LIMLgtLimA_TurnOff",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

RangeCheck

(Check if input signal range is valid)

There is no Range Check for LIM LgtLimA-Service:

Signal range is valid

Raw

{
  "ID": "16665450.0",
  "ASIL": "  QM",
  "Text": "RangeCheck\n\r(Check if input signal range is valid)\n\r \n\rThere is no Range Check for LIM LgtLimA-Service:\n\r \n\rSignal range is valid",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1355362.0",
  "Description": "RangeCheck\n\r(Check if input signal range is valid)\n\r \n\rThere is no Range Check for LIM LgtLimA-Service:\n\r \n\rSignal range is valid",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Saturation of input signals

The following input signals must be saturated to the maximum value of

VMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_LIM

and to the minimum value of

VMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_LIM.

.

* LIM_s_LgtCtlA_ADmd

* LIM_s_LgtCtlA_APredTar

* LIM_s_LgtCtlA_ATlrHiTar

* LIM_s_LgtCtlA_ATlrHiDyn

Raw

{
  "ID": "16665451.0",
  "ASIL": "  QM",
  "Text": "Saturation of input signals\n\r \n\r\n\rThe following input signals must be saturated to the maximum value of\n\rVMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_LIM\n\rand to the minimum value of\n\rVMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_LIM.\n\r.\n\r \n\r* LIM_s_LgtCtlA_ADmd\n\r* LIM_s_LgtCtlA_APredTar\n\r* LIM_s_LgtCtlA_ATlrHiTar\n\r* LIM_s_LgtCtlA_ATlrHiDyn",
  "Type": "Non-functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1355364.0",
  "Description": "Saturation of input signals\n\r \n\r\n\rThe following input signals must be saturated to the maximum value of\n\rVMMP_SINFCT_c_SrvLgtLimA_ARngLimHi_LIM\n\rand to the minimum value of\n\rVMMP_SINFCT_c_SrvLgtLimA_ARngLimLo_LIM.\n\r.\n\r \n\r* LIM_s_LgtCtlA_ADmd\n\r* LIM_s_LgtCtlA_APredTar\n\r* LIM_s_LgtCtlA_ATlrHiTar\n\r* LIM_s_LgtCtlA_ATlrHiDyn",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Assignment for Mapping *StDiagEve to *StVld:

*StDiagEve = CustFctOut_LgtLimA_StDiagEve

CFBLIM_s_LIMLgtLimA_StVld = *StVld

Raw

{
  "ID": "16665452.0",
  "ASIL": "  QM",
  "Text": "Assignment for Mapping *StDiagEve to *StVld:\n\r \n\r*StDiagEve = CustFctOut_LgtLimA_StDiagEve\n\rCFBLIM_s_LIMLgtLimA_StVld = *StVld",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1339843.0",
  "Description": "Assignment for Mapping *StDiagEve to *StVld:\n\r \n\r*StDiagEve = CustFctOut_LgtLimA_StDiagEve\n\rCFBLIM_s_LIMLgtLimA_StVld = *StVld",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Mapping *StDiagEve to *StVld

IF: 

*StDiagEve = VMMP_c_DiagEveSigNotVld

THEN:

*StVld = 3

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigFail

THEN:

*StVld = 3

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigDi

THEN:

*StVld = 2

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigIni

THEN:

*StVld = 2

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigSusp

THEN:

*StVld = 0

ELSEIF:

*StDiagEve = VMMP_c_DiagEveSigNone

THEN:

*StVld = 1

Raw

{
  "ID": "16665453.0",
  "ASIL": "  QM",
  "Text": "Mapping *StDiagEve to *StVld\n\r \n\r\n\rIF: \n\r*StDiagEve = VMMP_c_DiagEveSigNotVld\n\rTHEN:\n\r*StVld = 3\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigFail\n\rTHEN:\n\r*StVld = 3\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigDi\n\rTHEN:\n\r*StVld = 2\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigIni\n\rTHEN:\n\r*StVld = 2\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigSusp\n\rTHEN:\n\r*StVld = 0\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigNone\n\rTHEN:\n\r*StVld = 1",
  "Type": "Pre Condition",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1340861.0",
  "Description": "Mapping *StDiagEve to *StVld\n\r \n\r\n\rIF: \n\r*StDiagEve = VMMP_c_DiagEveSigNotVld\n\rTHEN:\n\r*StVld = 3\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigFail\n\rTHEN:\n\r*StVld = 3\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigDi\n\rTHEN:\n\r*StVld = 2\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigIni\n\rTHEN:\n\r*StVld = 2\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigSusp\n\rTHEN:\n\r*StVld = 0\n\rELSEIF:\n\r*StDiagEve = VMMP_c_DiagEveSigNone\n\rTHEN:\n\r*StVld = 1",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Fault Tolerant Time Interval (FTTI) 

Note: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).

If there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).

Raw

{
  "ID": "16665454.0",
  "ASIL": "  QM",
  "Text": "Fault Tolerant Time Interval (FTTI) \n\rNote: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n\r \n\rIf there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).",
  "Type": "Non-functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "no",
  "column_12": "",
  "Foreign ID": "1384790.0",
  "Description": "Fault Tolerant Time Interval (FTTI) \n\rNote: The Fault Tolerant Time Interval describes minimum time-span from the occurrence of a fault (e.g. receiving Error Bit2) to a possible occurrence of a hazardous event, if the safety mechanism is not activated (e.g. *StDiagEve = VMMP_c_DiagEveSigFail).\n\r \n\rIf there is no specific Fault Tolerant Time Interval (FTTI) defined, the fault reaction shall be done within 10 ms (one computational cycle).",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Assign generic output signals to specific output signals

Outputs

StAcv

CFBLIM_s_LIMLgtLimA_StAcv = CustFctOut_LgtLimA_StAcv

All other Outputs

CFBLIM_s_LIMLgtLimA_ADmd = CustFctOut_LgtLimA_ADmd

CFBLIM_s_LIMLgtLimA_APredTar = CustFctOut_LgtLimA_APredTar

CFBLIM_s_LIMLgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec

CFBLIM_s_LIMLgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc

CFBLIM_s_LIMLgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar

CFBLIM_s_LIMLgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn

CFBLIM_s_LIMLgtLimA_MdTarDyn = CustFctOut_LgtLimA_MdTarDyn

States

CFBLIM_s_DiagLIMLgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve

CFBLIM_s_LIMLgtLimA_StVld = *StVld (considering Mapping *StDiagEve to *StVld and CustFctOut_LgtLimA_StDiagEve)

Raw

{
  "ID": "16665455.0",
  "ASIL": "  QM",
  "Text": "Assign generic output signals to specific output signals\n\r \n\rOutputs\n\r \n\rStAcv\n\rCFBLIM_s_LIMLgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n\rAll other Outputs\n\rCFBLIM_s_LIMLgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n\rCFBLIM_s_LIMLgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc\n\rCFBLIM_s_LIMLgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n\rCFBLIM_s_LIMLgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n\rCFBLIM_s_LIMLgtLimA_MdTarDyn = CustFctOut_LgtLimA_MdTarDyn\n\r \n\r \n\rStates\n\rCFBLIM_s_DiagLIMLgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n\rCFBLIM_s_LIMLgtLimA_StVld = *StVld (considering Mapping *StDiagEve to *StVld and CustFctOut_LgtLimA_StDiagEve)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Assign generic output signals to specific output signals",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1339841.0",
  "Description": "Assign generic output signals to specific output signals\n\r \n\rOutputs\n\r \n\rStAcv\n\rCFBLIM_s_LIMLgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n\rAll other Outputs\n\rCFBLIM_s_LIMLgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n\rCFBLIM_s_LIMLgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc\n\rCFBLIM_s_LIMLgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n\rCFBLIM_s_LIMLgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n\rCFBLIM_s_LIMLgtLimA_MdTarDyn = CustFctOut_LgtLimA_MdTarDyn\n\r \n\r \n\rStates\n\rCFBLIM_s_DiagLIMLgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n\rCFBLIM_s_LIMLgtLimA_StVld = *StVld (considering Mapping *StDiagEve to *StVld and CustFctOut_LgtLimA_StDiagEve)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

Assign generic output signals to specific output signals

Outputs

StAcv

CFBLIM_s_LIMLgtLimA_StAcv = CustFctOut_LgtLimA_StAcv

All other Outputs

CFBLIM_s_LIMLgtLimA_ADmd = CustFctOut_LgtLimA_ADmd

CFBLIM_s_LIMLgtLimA_APredTar = CustFctOut_LgtLimA_APredTar

CFBLIM_s_LIMLgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec

CFBLIM_s_LIMLgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc

CFBLIM_s_LIMLgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar

CFBLIM_s_LIMLgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn

CFBLIM_s_LIMLgtLimA_MdTarDyn = CustFctOut_LgtLimA_MdTarDyn

LIM PEA

CFBLIM_s_LIM_SysStLim = CustFctOut_LIM_SysStLim

CFBLIM_s_LIM_VSet = CustFctOut_LIM_VSet

States

CFBLIM_s_DiagLIMLgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve

CFBLIM_s_LIMLgtLimA_StVld = *StVld (considering Mapping *StDiagEve to *StVld and CustFctOut_LgtLimA_StDiagEve)

Raw

{
  "ID": "37334504.0",
  "ASIL": "  QM",
  "Text": "Assign generic output signals to specific output signals\n\r \n\rOutputs\n\r \n\rStAcv\n\rCFBLIM_s_LIMLgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n\rAll other Outputs\n\rCFBLIM_s_LIMLgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n\rCFBLIM_s_LIMLgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc\n\rCFBLIM_s_LIMLgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n\rCFBLIM_s_LIMLgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n\rCFBLIM_s_LIMLgtLimA_MdTarDyn = CustFctOut_LgtLimA_MdTarDyn\n\r \n\rLIM PEA\n\rCFBLIM_s_LIM_SysStLim = CustFctOut_LIM_SysStLim\n\rCFBLIM_s_LIM_VSet = CustFctOut_LIM_VSet\n\r \n\rStates\n\rCFBLIM_s_DiagLIMLgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n\rCFBLIM_s_LIMLgtLimA_StVld = *StVld (considering Mapping *StDiagEve to *StVld and CustFctOut_LgtLimA_StDiagEve)",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "Assign generic output signals to specific output signals",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "",
  "Description": "Assign generic output signals to specific output signals\n\r \n\rOutputs\n\r \n\rStAcv\n\rCFBLIM_s_LIMLgtLimA_StAcv = CustFctOut_LgtLimA_StAcv\n\rAll other Outputs\n\rCFBLIM_s_LIMLgtLimA_ADmd = CustFctOut_LgtLimA_ADmd\n\rCFBLIM_s_LIMLgtLimA_APredTar = CustFctOut_LgtLimA_APredTar\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxDec = CustFctOut_LgtLimA_AGrdMaxDec\n\rCFBLIM_s_LIMLgtLimA_AGrdMaxInc = CustFctOut_LgtLimA_AGrdMaxInc\n\rCFBLIM_s_LIMLgtLimA_ATlrHiTar = CustFctOut_LgtLimA_ATlrHiTar\n\rCFBLIM_s_LIMLgtLimA_ATlrHiDyn = CustFctOut_LgtLimA_ATlrHiDyn\n\rCFBLIM_s_LIMLgtLimA_MdTarDyn = CustFctOut_LgtLimA_MdTarDyn\n\r \n\rLIM PEA\n\rCFBLIM_s_LIM_SysStLim = CustFctOut_LIM_SysStLim\n\rCFBLIM_s_LIM_VSet = CustFctOut_LIM_VSet\n\r \n\rStates\n\rCFBLIM_s_DiagLIMLgtLimA_StEve = CustFctOut_LgtLimA_StDiagEve\n\rCFBLIM_s_LIMLgtLimA_StVld = *StVld (considering Mapping *StDiagEve to *StVld and CustFctOut_LgtLimA_StDiagEve)",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}

The output signal CFBLIM_s_LIMLgtLimA_StVld must always have the values 0, 1, 2 or 3.

To test this requirement no separate test is necessary. Every implemented test case should check the signal range of *StVld in the end.

Raw

{
  "ID": "16665456.0",
  "ASIL": "  QM",
  "Text": "The output signal CFBLIM_s_LIMLgtLimA_StVld must always have the values 0, 1, 2 or 3.\n\r \n\rTo test this requirement no separate test is necessary. Every implemented test case should check the signal range of *StVld in the end.",
  "Type": "Functional",
  "Status": "Released",
  "Summary": "",
  "Relevant": "yes",
  "column_12": "",
  "Foreign ID": "1339883.0",
  "Description": "The output signal CFBLIM_s_LIMLgtLimA_StVld must always have the values 0, 1, 2 or 3.\n\r \n\rTo test this requirement no separate test is necessary. Every implemented test case should check the signal range of *StVld in the end.",
  "Vehicle Launch": "",
  "Vehicle Platform": "E³ 1.2"
}